--- /dev/null
+From 854d71c555dfc3383c1fde7d9989b6046e21093d Mon Sep 17 00:00:00 2001
+Date: Wed, 9 Oct 2024 07:48:05 +0200
+Subject: [PATCH] r8169: remove original workaround for RTL8125 broken rx issue
+
+Now that we have b9c7ac4fe22c ("r8169: disable ALDPS per default for
+RTL8125"), the first attempt to fix the issue shouldn't be needed
+any longer. So let's effectively revert 621735f59064 ("r8169: fix
+rare issue with broken rx after link-down on RTL8125") and see
+whether anybody complains.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -4777,11 +4777,7 @@ static void r8169_phylink_handler(struct
+ if (netif_carrier_ok(ndev)) {
+ rtl_link_chg_patch(tp);
+ pm_request_resume(d);
+- netif_wake_queue(tp->dev);
+ } else {
+- /* In few cases rx is broken after link-down otherwise */
+- if (rtl_is_8125(tp))
+- rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE);
+ pm_runtime_idle(d);
+ }
+
--- /dev/null
+From b8bf38440ba94e8ed8e2ae55c5dfb0276d30e843 Mon Sep 17 00:00:00 2001
+Date: Thu, 10 Oct 2024 12:58:02 +0200
+Subject: [PATCH] r8169: enable SG/TSO on selected chip versions per default
+
+Due to problem reports in the past SG and TSO/TSO6 are disabled per
+default. It's not fully clear which chip versions are affected, so we
+may impact also users of unaffected chip versions, unless they know
+how to use ethtool for enabling SG/TSO/TSO6.
+Vendor drivers r8168/r8125 enable SG/TSO/TSO6 for selected chip
+versions per default, I'd interpret this as confirmation that these
+chip versions are unaffected. So let's do the same here.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 16 +++++++++++-----
+ 1 file changed, 11 insertions(+), 5 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -5489,11 +5489,6 @@ static int rtl_init_one(struct pci_dev *
+
+ dev->features |= dev->hw_features;
+
+- /* There has been a number of reports that using SG/TSO results in
+- * tx timeouts. However for a lot of people SG/TSO works fine.
+- * Therefore disable both features by default, but allow users to
+- * enable them. Use at own risk!
+- */
+ if (rtl_chip_supports_csum_v2(tp)) {
+ dev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6;
+ netif_set_tso_max_size(dev, RTL_GSO_MAX_SIZE_V2);
+@@ -5504,6 +5499,17 @@ static int rtl_init_one(struct pci_dev *
+ netif_set_tso_max_segs(dev, RTL_GSO_MAX_SEGS_V1);
+ }
+
++ /* There has been a number of reports that using SG/TSO results in
++ * tx timeouts. However for a lot of people SG/TSO works fine.
++ * It's not fully clear which chip versions are affected. Vendor
++ * drivers enable SG/TSO for certain chip versions per default,
++ * let's mimic this here. On other chip versions users can
++ * use ethtool to enable SG/TSO, use at own risk!
++ */
++ if (tp->mac_version >= RTL_GIGA_MAC_VER_46 &&
++ tp->mac_version != RTL_GIGA_MAC_VER_61)
++ dev->features |= dev->hw_features;
++
+ dev->hw_features |= NETIF_F_RXALL;
+ dev->hw_features |= NETIF_F_RXFCS;
+
--- /dev/null
+From e3fc5139bd8ffaa1498adc21be4e8ecbc6aed508 Mon Sep 17 00:00:00 2001
+Date: Sun, 13 Oct 2024 11:17:39 +0200
+Subject: [PATCH] r8169: implement additional ethtool stats ops
+
+This adds support for ethtool standard statistics, and makes use of the
+extended hardware statistics being available from RTl8125.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 82 +++++++++++++++++++++++
+ 1 file changed, 82 insertions(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -2160,6 +2160,19 @@ static void rtl8169_get_ringparam(struct
+ data->tx_pending = NUM_TX_DESC;
+ }
+
++static void rtl8169_get_pause_stats(struct net_device *dev,
++ struct ethtool_pause_stats *pause_stats)
++{
++ struct rtl8169_private *tp = netdev_priv(dev);
++
++ if (!rtl_is_8125(tp))
++ return;
++
++ rtl8169_update_counters(tp);
++ pause_stats->tx_pause_frames = le32_to_cpu(tp->counters->tx_pause_on);
++ pause_stats->rx_pause_frames = le32_to_cpu(tp->counters->rx_pause_on);
++}
++
+ static void rtl8169_get_pauseparam(struct net_device *dev,
+ struct ethtool_pauseparam *data)
+ {
+@@ -2186,6 +2199,69 @@ static int rtl8169_set_pauseparam(struct
+ return 0;
+ }
+
++static void rtl8169_get_eth_mac_stats(struct net_device *dev,
++ struct ethtool_eth_mac_stats *mac_stats)
++{
++ struct rtl8169_private *tp = netdev_priv(dev);
++
++ rtl8169_update_counters(tp);
++
++ mac_stats->FramesTransmittedOK =
++ le64_to_cpu(tp->counters->tx_packets);
++ mac_stats->SingleCollisionFrames =
++ le32_to_cpu(tp->counters->tx_one_collision);
++ mac_stats->MultipleCollisionFrames =
++ le32_to_cpu(tp->counters->tx_multi_collision);
++ mac_stats->FramesReceivedOK =
++ le64_to_cpu(tp->counters->rx_packets);
++ mac_stats->AlignmentErrors =
++ le16_to_cpu(tp->counters->align_errors);
++ mac_stats->FramesLostDueToIntMACXmitError =
++ le64_to_cpu(tp->counters->tx_errors);
++ mac_stats->BroadcastFramesReceivedOK =
++ le64_to_cpu(tp->counters->rx_broadcast);
++ mac_stats->MulticastFramesReceivedOK =
++ le32_to_cpu(tp->counters->rx_multicast);
++
++ if (!rtl_is_8125(tp))
++ return;
++
++ mac_stats->AlignmentErrors =
++ le32_to_cpu(tp->counters->align_errors32);
++ mac_stats->OctetsTransmittedOK =
++ le64_to_cpu(tp->counters->tx_octets);
++ mac_stats->LateCollisions =
++ le32_to_cpu(tp->counters->tx_late_collision);
++ mac_stats->FramesAbortedDueToXSColls =
++ le32_to_cpu(tp->counters->tx_aborted32);
++ mac_stats->OctetsReceivedOK =
++ le64_to_cpu(tp->counters->rx_octets);
++ mac_stats->FramesLostDueToIntMACRcvError =
++ le32_to_cpu(tp->counters->rx_mac_error);
++ mac_stats->MulticastFramesXmittedOK =
++ le64_to_cpu(tp->counters->tx_multicast64);
++ mac_stats->BroadcastFramesXmittedOK =
++ le64_to_cpu(tp->counters->tx_broadcast64);
++ mac_stats->MulticastFramesReceivedOK =
++ le64_to_cpu(tp->counters->rx_multicast64);
++ mac_stats->FrameTooLongErrors =
++ le32_to_cpu(tp->counters->rx_frame_too_long);
++}
++
++static void rtl8169_get_eth_ctrl_stats(struct net_device *dev,
++ struct ethtool_eth_ctrl_stats *ctrl_stats)
++{
++ struct rtl8169_private *tp = netdev_priv(dev);
++
++ if (!rtl_is_8125(tp))
++ return;
++
++ rtl8169_update_counters(tp);
++
++ ctrl_stats->UnsupportedOpcodesReceived =
++ le32_to_cpu(tp->counters->rx_unknown_opcode);
++}
++
+ static const struct ethtool_ops rtl8169_ethtool_ops = {
+ .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
+ ETHTOOL_COALESCE_MAX_FRAMES,
+@@ -2207,8 +2283,11 @@ static const struct ethtool_ops rtl8169_
+ .get_link_ksettings = phy_ethtool_get_link_ksettings,
+ .set_link_ksettings = phy_ethtool_set_link_ksettings,
+ .get_ringparam = rtl8169_get_ringparam,
++ .get_pause_stats = rtl8169_get_pause_stats,
+ .get_pauseparam = rtl8169_get_pauseparam,
+ .set_pauseparam = rtl8169_set_pauseparam,
++ .get_eth_mac_stats = rtl8169_get_eth_mac_stats,
++ .get_eth_ctrl_stats = rtl8169_get_eth_ctrl_stats,
+ };
+
+ static enum mac_version rtl8169_get_mac_version(u16 xid, bool gmii)
+@@ -3893,6 +3972,9 @@ static void rtl_hw_start_8125(struct rtl
+ break;
+ }
+
++ /* enable extended tally counter */
++ r8168_mac_ocp_modify(tp, 0xea84, 0, BIT(1) | BIT(0));
++
+ rtl_hw_config(tp);
+ }
+
--- /dev/null
+From ac48430368c1a4f4e6c2fa92243b4b93fd25bee4 Mon Sep 17 00:00:00 2001
+Date: Wed, 16 Oct 2024 22:05:57 +0200
+Subject: [PATCH] r8169: don't take RTNL lock in rtl_task()
+
+There's not really a benefit here in taking the RTNL lock. The task
+handler does exception handling only, so we're in trouble anyway when
+we come here, and there's no need to protect against e.g. a parallel
+ethtool call.
+A benefit of removing the RTNL lock here is that we now can
+synchronously cancel the workqueue from a context holding the RTNL mutex.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 8 ++------
+ 1 file changed, 2 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -4800,10 +4800,8 @@ static void rtl_task(struct work_struct
+ container_of(work, struct rtl8169_private, wk.work);
+ int ret;
+
+- rtnl_lock();
+-
+ if (!test_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags))
+- goto out_unlock;
++ return;
+
+ if (test_and_clear_bit(RTL_FLAG_TASK_TX_TIMEOUT, tp->wk.flags)) {
+ /* if chip isn't accessible, reset bus to revive it */
+@@ -4812,7 +4810,7 @@ static void rtl_task(struct work_struct
+ if (ret < 0) {
+ netdev_err(tp->dev, "Can't reset secondary PCI bus, detach NIC\n");
+ netif_device_detach(tp->dev);
+- goto out_unlock;
++ return;
+ }
+ }
+
+@@ -4831,8 +4829,6 @@ reset:
+ } else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp->wk.flags)) {
+ rtl_reset_work(tp);
+ }
+-out_unlock:
+- rtnl_unlock();
+ }
+
+ static int rtl8169_poll(struct napi_struct *napi, int budget)
--- /dev/null
+From e2015942e90a021151a5751776f35830ba063be7 Mon Sep 17 00:00:00 2001
+Date: Wed, 16 Oct 2024 22:06:53 +0200
+Subject: [PATCH] r8169: replace custom flag with disable_work() et al
+
+So far we use a custom flag to define when a task can be scheduled and
+when not. Let's use the standard mechanism with disable_work() et al
+instead.
+Note that in rtl8169_close() we can remove the call to cancel_work()
+because we now call disable_work_sync() in rtl8169_down() already.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 18 ++++++------------
+ 1 file changed, 6 insertions(+), 12 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -617,7 +617,6 @@ struct rtl8169_tc_offsets {
+ };
+
+ enum rtl_flag {
+- RTL_FLAG_TASK_ENABLED = 0,
+ RTL_FLAG_TASK_RESET_PENDING,
+ RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE,
+ RTL_FLAG_TASK_TX_TIMEOUT,
+@@ -2502,11 +2501,9 @@ u16 rtl8168h_2_get_adc_bias_ioffset(stru
+
+ static void rtl_schedule_task(struct rtl8169_private *tp, enum rtl_flag flag)
+ {
+- if (!test_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags))
+- return;
+-
+ set_bit(flag, tp->wk.flags);
+- schedule_work(&tp->wk.work);
++ if (!schedule_work(&tp->wk.work))
++ clear_bit(flag, tp->wk.flags);
+ }
+
+ static void rtl8169_init_phy(struct rtl8169_private *tp)
+@@ -4800,9 +4797,6 @@ static void rtl_task(struct work_struct
+ container_of(work, struct rtl8169_private, wk.work);
+ int ret;
+
+- if (!test_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags))
+- return;
+-
+ if (test_and_clear_bit(RTL_FLAG_TASK_TX_TIMEOUT, tp->wk.flags)) {
+ /* if chip isn't accessible, reset bus to revive it */
+ if (RTL_R32(tp, TxConfig) == ~0) {
+@@ -4886,6 +4880,7 @@ static int r8169_phy_connect(struct rtl8
+
+ static void rtl8169_down(struct rtl8169_private *tp)
+ {
++ disable_work_sync(&tp->wk.work);
+ /* Clear all task flags */
+ bitmap_zero(tp->wk.flags, RTL_FLAG_MAX);
+
+@@ -4914,7 +4909,7 @@ static void rtl8169_up(struct rtl8169_pr
+ phy_resume(tp->phydev);
+ rtl8169_init_phy(tp);
+ napi_enable(&tp->napi);
+- set_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags);
++ enable_work(&tp->wk.work);
+ rtl_reset_work(tp);
+
+ phy_start(tp->phydev);
+@@ -4931,8 +4926,6 @@ static int rtl8169_close(struct net_devi
+ rtl8169_down(tp);
+ rtl8169_rx_clear(tp);
+
+- cancel_work(&tp->wk.work);
+-
+ free_irq(tp->irq, tp);
+
+ phy_disconnect(tp->phydev);
+@@ -5165,7 +5158,7 @@ static void rtl_remove_one(struct pci_de
+ if (pci_dev_run_wake(pdev))
+ pm_runtime_get_noresume(&pdev->dev);
+
+- cancel_work_sync(&tp->wk.work);
++ disable_work_sync(&tp->wk.work);
+
+ if (IS_ENABLED(CONFIG_R8169_LEDS))
+ r8169_remove_leds(tp->leds);
+@@ -5542,6 +5535,7 @@ static int rtl_init_one(struct pci_dev *
+ tp->irq = pci_irq_vector(pdev, 0);
+
+ INIT_WORK(&tp->wk.work, rtl_task);
++ disable_work(&tp->wk.work);
+
+ rtl_init_mac_address(tp);
+
--- /dev/null
+From 1c105bacb160b5918e917ab811552b7be69fc69c Mon Sep 17 00:00:00 2001
+Date: Wed, 16 Oct 2024 22:29:39 +0200
+Subject: [PATCH] r8169: avoid duplicated messages if loading firmware fails
+ and switch to warn level
+
+In case of a problem with firmware loading we inform at the driver level,
+in addition the firmware load code itself issues warnings. Therefore
+switch to firmware_request_nowarn() to avoid duplicated error messages.
+In addition switch to warn level because the firmware is optional and
+typically just fixes compatibility issues.
+
+---
+ drivers/net/ethernet/realtek/r8169_firmware.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_firmware.c
++++ b/drivers/net/ethernet/realtek/r8169_firmware.c
+@@ -215,7 +215,7 @@ int rtl_fw_request_firmware(struct rtl_f
+ {
+ int rc;
+
+- rc = request_firmware(&rtl_fw->fw, rtl_fw->fw_name, rtl_fw->dev);
++ rc = firmware_request_nowarn(&rtl_fw->fw, rtl_fw->fw_name, rtl_fw->dev);
+ if (rc < 0)
+ goto out;
+
+@@ -227,7 +227,7 @@ int rtl_fw_request_firmware(struct rtl_f
+
+ return 0;
+ out:
+- dev_err(rtl_fw->dev, "Unable to load firmware %s (%d)\n",
+- rtl_fw->fw_name, rc);
++ dev_warn(rtl_fw->dev, "Unable to load firmware %s (%d)\n",
++ rtl_fw->fw_name, rc);
+ return rc;
+ }
--- /dev/null
+From d64113c6bb5ea5a70b7c9c3a6bcadef307638187 Mon Sep 17 00:00:00 2001
+Date: Wed, 16 Oct 2024 22:31:10 +0200
+Subject: [PATCH] r8169: remove rtl_dash_loop_wait_high/low
+
+Remove rtl_dash_loop_wait_high/low to simplify the code.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 35 ++++++-----------------
+ 1 file changed, 8 insertions(+), 27 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -1345,40 +1345,19 @@ static void rtl8168ep_stop_cmac(struct r
+ RTL_W8(tp, IBCR0, RTL_R8(tp, IBCR0) & ~0x01);
+ }
+
+-static void rtl_dash_loop_wait(struct rtl8169_private *tp,
+- const struct rtl_cond *c,
+- unsigned long usecs, int n, bool high)
+-{
+- if (!tp->dash_enabled)
+- return;
+- rtl_loop_wait(tp, c, usecs, n, high);
+-}
+-
+-static void rtl_dash_loop_wait_high(struct rtl8169_private *tp,
+- const struct rtl_cond *c,
+- unsigned long d, int n)
+-{
+- rtl_dash_loop_wait(tp, c, d, n, true);
+-}
+-
+-static void rtl_dash_loop_wait_low(struct rtl8169_private *tp,
+- const struct rtl_cond *c,
+- unsigned long d, int n)
+-{
+- rtl_dash_loop_wait(tp, c, d, n, false);
+-}
+-
+ static void rtl8168dp_driver_start(struct rtl8169_private *tp)
+ {
+ r8168dp_oob_notify(tp, OOB_CMD_DRIVER_START);
+- rtl_dash_loop_wait_high(tp, &rtl_dp_ocp_read_cond, 10000, 10);
++ if (tp->dash_enabled)
++ rtl_loop_wait_high(tp, &rtl_dp_ocp_read_cond, 10000, 10);
+ }
+
+ static void rtl8168ep_driver_start(struct rtl8169_private *tp)
+ {
+ r8168ep_ocp_write(tp, 0x01, 0x180, OOB_CMD_DRIVER_START);
+ r8168ep_ocp_write(tp, 0x01, 0x30, r8168ep_ocp_read(tp, 0x30) | 0x01);
+- rtl_dash_loop_wait_high(tp, &rtl_ep_ocp_read_cond, 10000, 30);
++ if (tp->dash_enabled)
++ rtl_loop_wait_high(tp, &rtl_ep_ocp_read_cond, 10000, 30);
+ }
+
+ static void rtl8168_driver_start(struct rtl8169_private *tp)
+@@ -1392,7 +1371,8 @@ static void rtl8168_driver_start(struct
+ static void rtl8168dp_driver_stop(struct rtl8169_private *tp)
+ {
+ r8168dp_oob_notify(tp, OOB_CMD_DRIVER_STOP);
+- rtl_dash_loop_wait_low(tp, &rtl_dp_ocp_read_cond, 10000, 10);
++ if (tp->dash_enabled)
++ rtl_loop_wait_low(tp, &rtl_dp_ocp_read_cond, 10000, 10);
+ }
+
+ static void rtl8168ep_driver_stop(struct rtl8169_private *tp)
+@@ -1400,7 +1380,8 @@ static void rtl8168ep_driver_stop(struct
+ rtl8168ep_stop_cmac(tp);
+ r8168ep_ocp_write(tp, 0x01, 0x180, OOB_CMD_DRIVER_STOP);
+ r8168ep_ocp_write(tp, 0x01, 0x30, r8168ep_ocp_read(tp, 0x30) | 0x01);
+- rtl_dash_loop_wait_low(tp, &rtl_ep_ocp_read_cond, 10000, 10);
++ if (tp->dash_enabled)
++ rtl_loop_wait_low(tp, &rtl_ep_ocp_read_cond, 10000, 10);
+ }
+
+ static void rtl8168_driver_stop(struct rtl8169_private *tp)
--- /dev/null
+From c4e64095c00cb2de413cd6b90be047c273bcd491 Mon Sep 17 00:00:00 2001
+Date: Thu, 17 Oct 2024 22:27:44 +0200
+Subject: [PATCH] r8169: enable EEE at 2.5G per default on RTL8125B
+
+Register a6d/12 is shadowing register MDIO_AN_EEE_ADV2. So this line
+disables advertisement of EEE at 2.5G. Latest vendor driver r8125
+doesn't do this (any longer?), so this mode seems to be safe.
+EEE saves quite some energy, therefore enable this mode per default.
+
+---
+ drivers/net/ethernet/realtek/r8169_phy_config.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -99,7 +99,6 @@ static void rtl8125a_config_eee_phy(stru
+
+ static void rtl8125b_config_eee_phy(struct phy_device *phydev)
+ {
+- phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
+ phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
+ phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
+ phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
--- /dev/null
+From f75d1fbe7809bc5ed134204b920fd9e2fc5db1df Mon Sep 17 00:00:00 2001
+Date: Thu, 24 Oct 2024 22:42:33 +0200
+Subject: [PATCH] r8169: add support for RTL8125D
+
+This adds support for new chip version RTL8125D, which can be found on
+boards like Gigabyte X870E AORUS ELITE WIFI7. Firmware rtl8125d-1.fw
+for this chip version is available in linux-firmware already.
+
+---
+ drivers/net/ethernet/realtek/r8169.h | 1 +
+ drivers/net/ethernet/realtek/r8169_main.c | 23 +++++++++++++------
+ .../net/ethernet/realtek/r8169_phy_config.c | 10 ++++++++
+ 3 files changed, 27 insertions(+), 7 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169.h
++++ b/drivers/net/ethernet/realtek/r8169.h
+@@ -68,6 +68,7 @@ enum mac_version {
+ /* support for RTL_GIGA_MAC_VER_60 has been removed */
+ RTL_GIGA_MAC_VER_61,
+ RTL_GIGA_MAC_VER_63,
++ RTL_GIGA_MAC_VER_64,
+ RTL_GIGA_MAC_VER_65,
+ RTL_GIGA_MAC_VER_66,
+ RTL_GIGA_MAC_NONE
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -55,6 +55,7 @@
+ #define FIRMWARE_8107E_2 "rtl_nic/rtl8107e-2.fw"
+ #define FIRMWARE_8125A_3 "rtl_nic/rtl8125a-3.fw"
+ #define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
++#define FIRMWARE_8125D_1 "rtl_nic/rtl8125d-1.fw"
+ #define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw"
+ #define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw"
+
+@@ -138,6 +139,7 @@ static const struct {
+ [RTL_GIGA_MAC_VER_61] = {"RTL8125A", FIRMWARE_8125A_3},
+ /* reserve 62 for CFG_METHOD_4 in the vendor driver */
+ [RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
++ [RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
+ [RTL_GIGA_MAC_VER_65] = {"RTL8126A", FIRMWARE_8126A_2},
+ [RTL_GIGA_MAC_VER_66] = {"RTL8126A", FIRMWARE_8126A_3},
+ };
+@@ -706,6 +708,7 @@ MODULE_FIRMWARE(FIRMWARE_8168FP_3);
+ MODULE_FIRMWARE(FIRMWARE_8107E_2);
+ MODULE_FIRMWARE(FIRMWARE_8125A_3);
+ MODULE_FIRMWARE(FIRMWARE_8125B_2);
++MODULE_FIRMWARE(FIRMWARE_8125D_1);
+ MODULE_FIRMWARE(FIRMWARE_8126A_2);
+ MODULE_FIRMWARE(FIRMWARE_8126A_3);
+
+@@ -2078,10 +2081,7 @@ static void rtl_set_eee_txidle_timer(str
+ tp->tx_lpi_timer = timer_val;
+ r8168_mac_ocp_write(tp, 0xe048, timer_val);
+ break;
+- case RTL_GIGA_MAC_VER_61:
+- case RTL_GIGA_MAC_VER_63:
+- case RTL_GIGA_MAC_VER_65:
+- case RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
+ tp->tx_lpi_timer = timer_val;
+ RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
+ break;
+@@ -2292,6 +2292,9 @@ static enum mac_version rtl8169_get_mac_
+ { 0x7cf, 0x64a, RTL_GIGA_MAC_VER_66 },
+ { 0x7cf, 0x649, RTL_GIGA_MAC_VER_65 },
+
++ /* 8125D family. */
++ { 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
++
+ /* 8125B family. */
+ { 0x7cf, 0x641, RTL_GIGA_MAC_VER_63 },
+
+@@ -2557,9 +2560,7 @@ static void rtl_init_rxcfg(struct rtl816
+ case RTL_GIGA_MAC_VER_61:
+ RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
+ break;
+- case RTL_GIGA_MAC_VER_63:
+- case RTL_GIGA_MAC_VER_65:
+- case RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
+ RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
+ RX_PAUSE_SLOT_ON);
+ break;
+@@ -3871,6 +3872,12 @@ static void rtl_hw_start_8125b(struct rt
+ rtl_hw_start_8125_common(tp);
+ }
+
++static void rtl_hw_start_8125d(struct rtl8169_private *tp)
++{
++ rtl_set_def_aspm_entry_latency(tp);
++ rtl_hw_start_8125_common(tp);
++}
++
+ static void rtl_hw_start_8126a(struct rtl8169_private *tp)
+ {
+ rtl_set_def_aspm_entry_latency(tp);
+@@ -3919,6 +3926,7 @@ static void rtl_hw_config(struct rtl8169
+ [RTL_GIGA_MAC_VER_53] = rtl_hw_start_8117,
+ [RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
+ [RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
++ [RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
+ [RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,
+ [RTL_GIGA_MAC_VER_66] = rtl_hw_start_8126a,
+ };
+@@ -3936,6 +3944,7 @@ static void rtl_hw_start_8125(struct rtl
+ /* disable interrupt coalescing */
+ switch (tp->mac_version) {
+ case RTL_GIGA_MAC_VER_61:
++ case RTL_GIGA_MAC_VER_64:
+ for (i = 0xa00; i < 0xb00; i += 4)
+ RTL_W32(tp, i, 0);
+ break;
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -1103,6 +1103,15 @@ static void rtl8125b_hw_phy_config(struc
+ rtl8125b_config_eee_phy(phydev);
+ }
+
++static void rtl8125d_hw_phy_config(struct rtl8169_private *tp,
++ struct phy_device *phydev)
++{
++ r8169_apply_firmware(tp);
++ rtl8125_legacy_force_mode(phydev);
++ rtl8168g_disable_aldps(phydev);
++ rtl8125b_config_eee_phy(phydev);
++}
++
+ static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,
+ struct phy_device *phydev)
+ {
+@@ -1159,6 +1168,7 @@ void r8169_hw_phy_config(struct rtl8169_
+ [RTL_GIGA_MAC_VER_53] = rtl8117_hw_phy_config,
+ [RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
+ [RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
++ [RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
+ [RTL_GIGA_MAC_VER_65] = rtl8126a_hw_phy_config,
+ [RTL_GIGA_MAC_VER_66] = rtl8126a_hw_phy_config,
+ };
--- /dev/null
+From b8bd8c44a266c9a7dcb907eab10fbb119e3f6494 Mon Sep 17 00:00:00 2001
+Date: Thu, 24 Oct 2024 22:48:59 +0200
+Subject: [PATCH] r8169: fix inconsistent indenting in
+ rtl8169_get_eth_mac_stats
+
+This fixes an inconsistent indenting introduced with e3fc5139bd8f
+("r8169: implement additional ethtool stats ops").
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -2224,7 +2224,7 @@ static void rtl8169_get_eth_mac_stats(st
+ le64_to_cpu(tp->counters->tx_broadcast64);
+ mac_stats->MulticastFramesReceivedOK =
+ le64_to_cpu(tp->counters->rx_multicast64);
+- mac_stats->FrameTooLongErrors =
++ mac_stats->FrameTooLongErrors =
+ le32_to_cpu(tp->counters->rx_frame_too_long);
+ }
+
--- /dev/null
+From eb90f876b7961d702d7fc549e14614860f531e60 Mon Sep 17 00:00:00 2001
+Date: Thu, 31 Oct 2024 22:42:52 +0100
+Subject: [PATCH] r8169: align RTL8125 EEE config with vendor driver
+
+Align the EEE config for RTL8125A/RTL8125B with vendor driver r8125.
+This should help to avoid compatibility issues.
+
+---
+ .../net/ethernet/realtek/r8169_phy_config.c | 18 ++++++++++++------
+ 1 file changed, 12 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -89,19 +89,25 @@ static void rtl8168h_config_eee_phy(stru
+ phy_modify_paged(phydev, 0xa42, 0x14, 0x0000, 0x0080);
+ }
+
+-static void rtl8125a_config_eee_phy(struct phy_device *phydev)
++static void rtl8125_common_config_eee_phy(struct phy_device *phydev)
+ {
+- rtl8168h_config_eee_phy(phydev);
++ phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
++ phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
++ phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
++}
+
++static void rtl8125a_config_eee_phy(struct phy_device *phydev)
++{
++ rtl8168g_config_eee_phy(phydev);
++ /* disable EEE at 2.5Gbps */
+ phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
+- phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
++ rtl8125_common_config_eee_phy(phydev);
+ }
+
+ static void rtl8125b_config_eee_phy(struct phy_device *phydev)
+ {
+- phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
+- phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
+- phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
++ rtl8168g_config_eee_phy(phydev);
++ rtl8125_common_config_eee_phy(phydev);
+ }
+
+ static void rtl8169s_hw_phy_config(struct rtl8169_private *tp,
--- /dev/null
+From 4af2f60bf7378bd5c92b15a528d8c6c7d02bed6c Mon Sep 17 00:00:00 2001
+Date: Thu, 31 Oct 2024 22:43:45 +0100
+Subject: [PATCH] r8169: align RTL8125/RTL8126 PHY config with vendor driver
+
+This aligns some parameters with vendor driver r8125/r8126 to avoid
+compatibility issues. Note that for RTL8125B there's no functional
+change, just the open-coded version of the function is replaced.
+
+---
+ drivers/net/ethernet/realtek/r8169_phy_config.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -1073,8 +1073,8 @@ static void rtl8125b_hw_phy_config(struc
+ struct phy_device *phydev)
+ {
+ r8169_apply_firmware(tp);
++ rtl8168g_enable_gphy_10m(phydev);
+
+- phy_modify_paged(phydev, 0xa44, 0x11, 0x0000, 0x0800);
+ phy_modify_paged(phydev, 0xac4, 0x13, 0x00f0, 0x0090);
+ phy_modify_paged(phydev, 0xad3, 0x10, 0x0003, 0x0001);
+
+@@ -1113,6 +1113,7 @@ static void rtl8125d_hw_phy_config(struc
+ struct phy_device *phydev)
+ {
+ r8169_apply_firmware(tp);
++ rtl8168g_enable_gphy_10m(phydev);
+ rtl8125_legacy_force_mode(phydev);
+ rtl8168g_disable_aldps(phydev);
+ rtl8125b_config_eee_phy(phydev);
+@@ -1122,6 +1123,9 @@ static void rtl8126a_hw_phy_config(struc
+ struct phy_device *phydev)
+ {
+ r8169_apply_firmware(tp);
++ rtl8168g_enable_gphy_10m(phydev);
++ rtl8125_legacy_force_mode(phydev);
++ rtl8168g_disable_aldps(phydev);
+ }
+
+ void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
--- /dev/null
+From a3d8520e6a19ab018da6c7fc22512c913697a829 Mon Sep 17 00:00:00 2001
+Date: Thu, 31 Oct 2024 22:44:36 +0100
+Subject: [PATCH] r8169: align RTL8126 EEE config with vendor driver
+
+Align the EEE config for RTL8126A with vendor driver r8126 to avoid
+compatibility issues.
+
+---
+ drivers/net/ethernet/realtek/r8169_phy_config.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -1126,6 +1126,7 @@ static void rtl8126a_hw_phy_config(struc
+ rtl8168g_enable_gphy_10m(phydev);
+ rtl8125_legacy_force_mode(phydev);
+ rtl8168g_disable_aldps(phydev);
++ rtl8125_common_config_eee_phy(phydev);
+ }
+
+ void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
--- /dev/null
+From 2cd02f2fdd8a92e5b6b85ff64eab0fc549b30c07 Mon Sep 17 00:00:00 2001
+Date: Sat, 2 Nov 2024 14:49:01 +0100
+Subject: [PATCH] r8169: improve initialization of RSS registers on
+ RTL8125/RTL8126
+
+Replace the register addresses with the names used in r8125/r8126
+vendor driver, and consider that RSS_CTRL_8125 is a 32 bit register.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -346,6 +346,8 @@ enum rtl8125_registers {
+ TxPoll_8125 = 0x90,
+ LEDSEL3 = 0x96,
+ MAC0_BKP = 0x19e0,
++ RSS_CTRL_8125 = 0x4500,
++ Q_NUM_CTRL_8125 = 0x4800,
+ EEE_TXIDLE_TIMER_8125 = 0x6048,
+ };
+
+@@ -3765,8 +3767,8 @@ static void rtl_hw_start_8125_common(str
+ rtl_pcie_state_l2l3_disable(tp);
+
+ RTL_W16(tp, 0x382, 0x221b);
+- RTL_W8(tp, 0x4500, 0);
+- RTL_W16(tp, 0x4800, 0);
++ RTL_W32(tp, RSS_CTRL_8125, 0);
++ RTL_W16(tp, Q_NUM_CTRL_8125, 0);
+
+ /* disable UPS */
+ r8168_mac_ocp_modify(tp, 0xd40a, 0x0010, 0x0000);
--- /dev/null
+From 83cb4b470c66b37b19a347a35cea01e0cbdd258d Mon Sep 17 00:00:00 2001
+Date: Mon, 4 Nov 2024 23:16:20 +0100
+Subject: [PATCH] r8169: remove leftover locks after reverted change
+
+After e31a9fedc7d8 ("Revert "r8169: disable ASPM during NAPI poll"")
+these locks aren't needed any longer.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 29 ++---------------------
+ 1 file changed, 2 insertions(+), 27 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -661,13 +661,9 @@ struct rtl8169_private {
+ struct work_struct work;
+ } wk;
+
+- raw_spinlock_t config25_lock;
+ raw_spinlock_t mac_ocp_lock;
+ struct mutex led_lock; /* serialize LED ctrl RMW access */
+
+- raw_spinlock_t cfg9346_usage_lock;
+- int cfg9346_usage_count;
+-
+ unsigned supports_gmii:1;
+ unsigned aspm_manageable:1;
+ unsigned dash_enabled:1;
+@@ -721,22 +717,12 @@ static inline struct device *tp_to_dev(s
+
+ static void rtl_lock_config_regs(struct rtl8169_private *tp)
+ {
+- unsigned long flags;
+-
+- raw_spin_lock_irqsave(&tp->cfg9346_usage_lock, flags);
+- if (!--tp->cfg9346_usage_count)
+- RTL_W8(tp, Cfg9346, Cfg9346_Lock);
+- raw_spin_unlock_irqrestore(&tp->cfg9346_usage_lock, flags);
++ RTL_W8(tp, Cfg9346, Cfg9346_Lock);
+ }
+
+ static void rtl_unlock_config_regs(struct rtl8169_private *tp)
+ {
+- unsigned long flags;
+-
+- raw_spin_lock_irqsave(&tp->cfg9346_usage_lock, flags);
+- if (!tp->cfg9346_usage_count++)
+- RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
+- raw_spin_unlock_irqrestore(&tp->cfg9346_usage_lock, flags);
++ RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
+ }
+
+ static void rtl_pci_commit(struct rtl8169_private *tp)
+@@ -747,24 +733,18 @@ static void rtl_pci_commit(struct rtl816
+
+ static void rtl_mod_config2(struct rtl8169_private *tp, u8 clear, u8 set)
+ {
+- unsigned long flags;
+ u8 val;
+
+- raw_spin_lock_irqsave(&tp->config25_lock, flags);
+ val = RTL_R8(tp, Config2);
+ RTL_W8(tp, Config2, (val & ~clear) | set);
+- raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
+ }
+
+ static void rtl_mod_config5(struct rtl8169_private *tp, u8 clear, u8 set)
+ {
+- unsigned long flags;
+ u8 val;
+
+- raw_spin_lock_irqsave(&tp->config25_lock, flags);
+ val = RTL_R8(tp, Config5);
+ RTL_W8(tp, Config5, (val & ~clear) | set);
+- raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
+ }
+
+ static bool rtl_is_8125(struct rtl8169_private *tp)
+@@ -1570,7 +1550,6 @@ static void __rtl8169_set_wol(struct rtl
+ { WAKE_MAGIC, Config3, MagicPacket }
+ };
+ unsigned int i, tmp = ARRAY_SIZE(cfg);
+- unsigned long flags;
+ u8 options;
+
+ rtl_unlock_config_regs(tp);
+@@ -1589,14 +1568,12 @@ static void __rtl8169_set_wol(struct rtl
+ r8168_mac_ocp_modify(tp, 0xc0b6, BIT(0), 0);
+ }
+
+- raw_spin_lock_irqsave(&tp->config25_lock, flags);
+ for (i = 0; i < tmp; i++) {
+ options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask;
+ if (wolopts & cfg[i].opt)
+ options |= cfg[i].mask;
+ RTL_W8(tp, cfg[i].reg, options);
+ }
+- raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
+
+ switch (tp->mac_version) {
+ case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
+@@ -5451,8 +5428,6 @@ static int rtl_init_one(struct pci_dev *
+ tp->supports_gmii = ent->driver_data == RTL_CFG_NO_GBIT ? 0 : 1;
+ tp->ocp_base = OCP_STD_PHY_BASE;
+
+- raw_spin_lock_init(&tp->cfg9346_usage_lock);
+- raw_spin_lock_init(&tp->config25_lock);
+ raw_spin_lock_init(&tp->mac_ocp_lock);
+ mutex_init(&tp->led_lock);
+
--- /dev/null
+From c507e96b5763b36b63ad50ad804341f72ea000e4 Mon Sep 17 00:00:00 2001
+Date: Wed, 6 Nov 2024 17:55:45 +0100
+Subject: [PATCH] r8169: improve __rtl8169_set_wol
+
+Add helper r8169_mod_reg8_cond() what allows to significantly simplify
+__rtl8169_set_wol().
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 55 ++++++++++-------------
+ 1 file changed, 24 insertions(+), 31 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -747,6 +747,20 @@ static void rtl_mod_config5(struct rtl81
+ RTL_W8(tp, Config5, (val & ~clear) | set);
+ }
+
++static void r8169_mod_reg8_cond(struct rtl8169_private *tp, int reg,
++ u8 bits, bool cond)
++{
++ u8 val, old_val;
++
++ old_val = RTL_R8(tp, reg);
++ if (cond)
++ val = old_val | bits;
++ else
++ val = old_val & ~bits;
++ if (val != old_val)
++ RTL_W8(tp, reg, val);
++}
++
+ static bool rtl_is_8125(struct rtl8169_private *tp)
+ {
+ return tp->mac_version >= RTL_GIGA_MAC_VER_61;
+@@ -1537,58 +1551,37 @@ static void rtl8169_get_wol(struct net_d
+
+ static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
+ {
+- static const struct {
+- u32 opt;
+- u16 reg;
+- u8 mask;
+- } cfg[] = {
+- { WAKE_PHY, Config3, LinkUp },
+- { WAKE_UCAST, Config5, UWF },
+- { WAKE_BCAST, Config5, BWF },
+- { WAKE_MCAST, Config5, MWF },
+- { WAKE_ANY, Config5, LanWake },
+- { WAKE_MAGIC, Config3, MagicPacket }
+- };
+- unsigned int i, tmp = ARRAY_SIZE(cfg);
+- u8 options;
+-
+ rtl_unlock_config_regs(tp);
+
+ if (rtl_is_8168evl_up(tp)) {
+- tmp--;
+ if (wolopts & WAKE_MAGIC)
+ rtl_eri_set_bits(tp, 0x0dc, MagicPacket_v2);
+ else
+ rtl_eri_clear_bits(tp, 0x0dc, MagicPacket_v2);
+ } else if (rtl_is_8125(tp)) {
+- tmp--;
+ if (wolopts & WAKE_MAGIC)
+ r8168_mac_ocp_modify(tp, 0xc0b6, 0, BIT(0));
+ else
+ r8168_mac_ocp_modify(tp, 0xc0b6, BIT(0), 0);
++ } else {
++ r8169_mod_reg8_cond(tp, Config3, MagicPacket,
++ wolopts & WAKE_MAGIC);
+ }
+
+- for (i = 0; i < tmp; i++) {
+- options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask;
+- if (wolopts & cfg[i].opt)
+- options |= cfg[i].mask;
+- RTL_W8(tp, cfg[i].reg, options);
+- }
++ r8169_mod_reg8_cond(tp, Config3, LinkUp, wolopts & WAKE_PHY);
++ r8169_mod_reg8_cond(tp, Config5, UWF, wolopts & WAKE_UCAST);
++ r8169_mod_reg8_cond(tp, Config5, BWF, wolopts & WAKE_BCAST);
++ r8169_mod_reg8_cond(tp, Config5, MWF, wolopts & WAKE_MCAST);
++ r8169_mod_reg8_cond(tp, Config5, LanWake, wolopts);
+
+ switch (tp->mac_version) {
+ case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
+- options = RTL_R8(tp, Config1) & ~PMEnable;
+- if (wolopts)
+- options |= PMEnable;
+- RTL_W8(tp, Config1, options);
++ r8169_mod_reg8_cond(tp, Config1, PMEnable, wolopts);
+ break;
+ case RTL_GIGA_MAC_VER_34:
+ case RTL_GIGA_MAC_VER_37:
+ case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
+- if (wolopts)
+- rtl_mod_config2(tp, 0, PME_SIGNAL);
+- else
+- rtl_mod_config2(tp, PME_SIGNAL, 0);
++ r8169_mod_reg8_cond(tp, Config2, PME_SIGNAL, wolopts);
+ break;
+ default:
+ break;
--- /dev/null
+From 330dc2297c82953dff402e0b4176a5383a618538 Mon Sep 17 00:00:00 2001
+Date: Wed, 6 Nov 2024 17:56:28 +0100
+Subject: [PATCH] r8169: improve rtl_set_d3_pll_down
+
+Make use of new helper r8169_mod_reg8_cond() and move from a switch()
+to an if() clause. Benefit is that we don't have to touch this piece of
+code each time support for a new chip version is added.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 18 +++++-------------
+ 1 file changed, 5 insertions(+), 13 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -1430,19 +1430,11 @@ static enum rtl_dash_type rtl_get_dash_t
+
+ static void rtl_set_d3_pll_down(struct rtl8169_private *tp, bool enable)
+ {
+- switch (tp->mac_version) {
+- case RTL_GIGA_MAC_VER_25 ... RTL_GIGA_MAC_VER_26:
+- case RTL_GIGA_MAC_VER_29 ... RTL_GIGA_MAC_VER_30:
+- case RTL_GIGA_MAC_VER_32 ... RTL_GIGA_MAC_VER_37:
+- case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
+- if (enable)
+- RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~D3_NO_PLL_DOWN);
+- else
+- RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | D3_NO_PLL_DOWN);
+- break;
+- default:
+- break;
+- }
++ if (tp->mac_version >= RTL_GIGA_MAC_VER_25 &&
++ tp->mac_version != RTL_GIGA_MAC_VER_28 &&
++ tp->mac_version != RTL_GIGA_MAC_VER_31 &&
++ tp->mac_version != RTL_GIGA_MAC_VER_38)
++ r8169_mod_reg8_cond(tp, PMCH, D3_NO_PLL_DOWN, !enable);
+ }
+
+ static void rtl_reset_packet_filter(struct rtl8169_private *tp)
--- /dev/null
+From e3e9e9039fa6ae885c7d5c954d7b9f105fa23e8f Mon Sep 17 00:00:00 2001
+Date: Wed, 6 Nov 2024 17:57:08 +0100
+Subject: [PATCH] r8169: align WAKE_PHY handling with r8125/r8126 vendor
+ drivers
+
+Vendor drivers r8125/r8126 apply this additional magic setting when
+enabling WAKE_PHY, so do the same here.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -1561,6 +1561,9 @@ static void __rtl8169_set_wol(struct rtl
+ }
+
+ r8169_mod_reg8_cond(tp, Config3, LinkUp, wolopts & WAKE_PHY);
++ if (rtl_is_8125(tp))
++ r8168_mac_ocp_modify(tp, 0xe0c6, 0x3f,
++ wolopts & WAKE_PHY ? 0x13 : 0);
+ r8169_mod_reg8_cond(tp, Config5, UWF, wolopts & WAKE_UCAST);
+ r8169_mod_reg8_cond(tp, Config5, BWF, wolopts & WAKE_BCAST);
+ r8169_mod_reg8_cond(tp, Config5, MWF, wolopts & WAKE_MCAST);
--- /dev/null
+From 7a3bcd39ae1f0e3ab896d9df62339ab4297a0bfd Mon Sep 17 00:00:00 2001
+Date: Sat, 9 Nov 2024 23:12:12 +0100
+Subject: [PATCH] r8169: use helper r8169_mod_reg8_cond to simplify
+ rtl_jumbo_config
+
+Use recently added helper r8169_mod_reg8_cond() to simplify jumbo
+mode configuration.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 77 ++++-------------------
+ 1 file changed, 11 insertions(+), 66 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -2542,86 +2542,31 @@ static void rtl8169_init_ring_indexes(st
+ tp->dirty_tx = tp->cur_tx = tp->cur_rx = 0;
+ }
+
+-static void r8168c_hw_jumbo_enable(struct rtl8169_private *tp)
+-{
+- RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+- RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
+-}
+-
+-static void r8168c_hw_jumbo_disable(struct rtl8169_private *tp)
+-{
+- RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+- RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
+-}
+-
+-static void r8168dp_hw_jumbo_enable(struct rtl8169_private *tp)
+-{
+- RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+-}
+-
+-static void r8168dp_hw_jumbo_disable(struct rtl8169_private *tp)
+-{
+- RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+-}
+-
+-static void r8168e_hw_jumbo_enable(struct rtl8169_private *tp)
+-{
+- RTL_W8(tp, MaxTxPacketSize, 0x24);
+- RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+- RTL_W8(tp, Config4, RTL_R8(tp, Config4) | 0x01);
+-}
+-
+-static void r8168e_hw_jumbo_disable(struct rtl8169_private *tp)
+-{
+- RTL_W8(tp, MaxTxPacketSize, 0x3f);
+- RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+- RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~0x01);
+-}
+-
+-static void r8168b_1_hw_jumbo_enable(struct rtl8169_private *tp)
+-{
+- RTL_W8(tp, Config4, RTL_R8(tp, Config4) | (1 << 0));
+-}
+-
+-static void r8168b_1_hw_jumbo_disable(struct rtl8169_private *tp)
+-{
+- RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~(1 << 0));
+-}
+-
+ static void rtl_jumbo_config(struct rtl8169_private *tp)
+ {
+ bool jumbo = tp->dev->mtu > ETH_DATA_LEN;
+ int readrq = 4096;
+
++ if (jumbo && tp->mac_version >= RTL_GIGA_MAC_VER_17 &&
++ tp->mac_version <= RTL_GIGA_MAC_VER_26)
++ readrq = 512;
++
+ rtl_unlock_config_regs(tp);
+ switch (tp->mac_version) {
+ case RTL_GIGA_MAC_VER_17:
+- if (jumbo) {
+- readrq = 512;
+- r8168b_1_hw_jumbo_enable(tp);
+- } else {
+- r8168b_1_hw_jumbo_disable(tp);
+- }
++ r8169_mod_reg8_cond(tp, Config4, BIT(0), jumbo);
+ break;
+ case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_26:
+- if (jumbo) {
+- readrq = 512;
+- r8168c_hw_jumbo_enable(tp);
+- } else {
+- r8168c_hw_jumbo_disable(tp);
+- }
++ r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);
++ r8169_mod_reg8_cond(tp, Config4, Jumbo_En1, jumbo);
+ break;
+ case RTL_GIGA_MAC_VER_28:
+- if (jumbo)
+- r8168dp_hw_jumbo_enable(tp);
+- else
+- r8168dp_hw_jumbo_disable(tp);
++ r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);
+ break;
+ case RTL_GIGA_MAC_VER_31 ... RTL_GIGA_MAC_VER_33:
+- if (jumbo)
+- r8168e_hw_jumbo_enable(tp);
+- else
+- r8168e_hw_jumbo_disable(tp);
++ RTL_W8(tp, MaxTxPacketSize, jumbo ? 0x24 : 0x3f);
++ r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);
++ r8169_mod_reg8_cond(tp, Config4, BIT(0), jumbo);
+ break;
+ default:
+ break;
--- /dev/null
+From e340bff27e63ed61a1e9895bed546107859e48a7 Mon Sep 17 00:00:00 2001
+Date: Fri, 8 Nov 2024 08:08:24 +0100
+Subject: [PATCH] r8169: copy vendor driver 2.5G/5G EEE advertisement
+ constraints
+
+Vendor driver r8125 doesn't advertise 2.5G EEE on RTL8125A, and r8126
+doesn't advertise 5G EEE. Likely there are compatibility issues,
+therefore do the same in r8169.
+With this change we don't have to disable 2.5G EEE advertisement in
+rtl8125a_config_eee_phy() any longer.
+We use new phylib accessor phy_set_eee_broken() to mark the respective
+EEE modes as broken.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 6 ++++++
+ drivers/net/ethernet/realtek/r8169_phy_config.c | 16 ++++------------
+ 2 files changed, 10 insertions(+), 12 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -5227,6 +5227,11 @@ static int r8169_mdio_register(struct rt
+ phy_support_eee(tp->phydev);
+ phy_support_asym_pause(tp->phydev);
+
++ /* mimic behavior of r8125/r8126 vendor drivers */
++ if (tp->mac_version == RTL_GIGA_MAC_VER_61)
++ tp->phydev->eee_broken_modes |= MDIO_EEE_2_5GT;
++ tp->phydev->eee_broken_modes |= MDIO_EEE_5GT;
++
+ /* PHY will be woken up in rtl_open() */
+ phy_suspend(tp->phydev);
+
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -96,15 +96,7 @@ static void rtl8125_common_config_eee_ph
+ phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
+ }
+
+-static void rtl8125a_config_eee_phy(struct phy_device *phydev)
+-{
+- rtl8168g_config_eee_phy(phydev);
+- /* disable EEE at 2.5Gbps */
+- phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
+- rtl8125_common_config_eee_phy(phydev);
+-}
+-
+-static void rtl8125b_config_eee_phy(struct phy_device *phydev)
++static void rtl8125_config_eee_phy(struct phy_device *phydev)
+ {
+ rtl8168g_config_eee_phy(phydev);
+ rtl8125_common_config_eee_phy(phydev);
+@@ -1066,7 +1058,7 @@ static void rtl8125a_2_hw_phy_config(str
+ rtl8168g_enable_gphy_10m(phydev);
+
+ rtl8168g_disable_aldps(phydev);
+- rtl8125a_config_eee_phy(phydev);
++ rtl8125_config_eee_phy(phydev);
+ }
+
+ static void rtl8125b_hw_phy_config(struct rtl8169_private *tp,
+@@ -1106,7 +1098,7 @@ static void rtl8125b_hw_phy_config(struc
+
+ rtl8125_legacy_force_mode(phydev);
+ rtl8168g_disable_aldps(phydev);
+- rtl8125b_config_eee_phy(phydev);
++ rtl8125_config_eee_phy(phydev);
+ }
+
+ static void rtl8125d_hw_phy_config(struct rtl8169_private *tp,
+@@ -1116,7 +1108,7 @@ static void rtl8125d_hw_phy_config(struc
+ rtl8168g_enable_gphy_10m(phydev);
+ rtl8125_legacy_force_mode(phydev);
+ rtl8168g_disable_aldps(phydev);
+- rtl8125b_config_eee_phy(phydev);
++ rtl8125_config_eee_phy(phydev);
+ }
+
+ static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,
--- /dev/null
+From 2e20bf8cc05766dcd0357cdfcada49e1bc45512b Mon Sep 17 00:00:00 2001
+Date: Mon, 2 Dec 2024 21:14:35 +0100
+Subject: [PATCH] r8169: remove unused flag RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE
+
+After 854d71c555dfc3 ("r8169: remove original workaround for RTL8125
+broken rx issue") this flag isn't used any longer. So remove it.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 3 ---
+ 1 file changed, 3 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -622,7 +622,6 @@ struct rtl8169_tc_offsets {
+
+ enum rtl_flag {
+ RTL_FLAG_TASK_RESET_PENDING,
+- RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE,
+ RTL_FLAG_TASK_TX_TIMEOUT,
+ RTL_FLAG_MAX
+ };
+@@ -4722,8 +4721,6 @@ static void rtl_task(struct work_struct
+ reset:
+ rtl_reset_work(tp);
+ netif_wake_queue(tp->dev);
+- } else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp->wk.flags)) {
+- rtl_reset_work(tp);
+ }
+ }
+
--- /dev/null
+From bb18265c3aba92b91a1355609769f3e967b65dee Mon Sep 17 00:00:00 2001
+Date: Mon, 2 Dec 2024 21:20:02 +0100
+Subject: [PATCH] r8169: remove support for chip version 11
+
+This is a follow-up to 982300c115d2 ("r8169: remove detection of chip
+version 11 (early RTL8168b)"). Nobody complained yet, so remove
+support for this chip version.
+
+---
+ drivers/net/ethernet/realtek/r8169.h | 2 +-
+ drivers/net/ethernet/realtek/r8169_main.c | 14 +-------------
+ drivers/net/ethernet/realtek/r8169_phy_config.c | 10 ----------
+ 3 files changed, 2 insertions(+), 24 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169.h
++++ b/drivers/net/ethernet/realtek/r8169.h
+@@ -23,7 +23,7 @@ enum mac_version {
+ RTL_GIGA_MAC_VER_08,
+ RTL_GIGA_MAC_VER_09,
+ RTL_GIGA_MAC_VER_10,
+- RTL_GIGA_MAC_VER_11,
++ /* support for RTL_GIGA_MAC_VER_11 has been removed */
+ /* RTL_GIGA_MAC_VER_12 was handled the same as VER_17 */
+ /* RTL_GIGA_MAC_VER_13 was merged with VER_10 */
+ RTL_GIGA_MAC_VER_14,
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -103,7 +103,6 @@ static const struct {
+ [RTL_GIGA_MAC_VER_08] = {"RTL8102e" },
+ [RTL_GIGA_MAC_VER_09] = {"RTL8102e/RTL8103e" },
+ [RTL_GIGA_MAC_VER_10] = {"RTL8101e/RTL8100e" },
+- [RTL_GIGA_MAC_VER_11] = {"RTL8168b/8111b" },
+ [RTL_GIGA_MAC_VER_14] = {"RTL8401" },
+ [RTL_GIGA_MAC_VER_17] = {"RTL8168b/8111b" },
+ [RTL_GIGA_MAC_VER_18] = {"RTL8168cp/8111cp" },
+@@ -2334,7 +2333,7 @@ static enum mac_version rtl8169_get_mac_
+
+ /* 8168B family. */
+ { 0x7c8, 0x380, RTL_GIGA_MAC_VER_17 },
+- /* This one is very old and rare, let's see if anybody complains.
++ /* This one is very old and rare, support has been removed.
+ * { 0x7c8, 0x300, RTL_GIGA_MAC_VER_11 },
+ */
+
+@@ -3802,7 +3801,6 @@ static void rtl_hw_config(struct rtl8169
+ [RTL_GIGA_MAC_VER_08] = rtl_hw_start_8102e_3,
+ [RTL_GIGA_MAC_VER_09] = rtl_hw_start_8102e_2,
+ [RTL_GIGA_MAC_VER_10] = NULL,
+- [RTL_GIGA_MAC_VER_11] = rtl_hw_start_8168b,
+ [RTL_GIGA_MAC_VER_14] = rtl_hw_start_8401,
+ [RTL_GIGA_MAC_VER_17] = rtl_hw_start_8168b,
+ [RTL_GIGA_MAC_VER_18] = rtl_hw_start_8168cp_1,
+@@ -4678,12 +4676,6 @@ static irqreturn_t rtl8169_interrupt(int
+ if (status & LinkChg)
+ phy_mac_interrupt(tp->phydev);
+
+- if (unlikely(status & RxFIFOOver &&
+- tp->mac_version == RTL_GIGA_MAC_VER_11)) {
+- netif_stop_queue(tp->dev);
+- rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
+- }
+-
+ rtl_irq_disable(tp);
+ napi_schedule(&tp->napi);
+ out:
+@@ -5099,9 +5091,6 @@ static void rtl_set_irq_mask(struct rtl8
+
+ if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
+ tp->irq_mask |= SYSErr | RxFIFOOver;
+- else if (tp->mac_version == RTL_GIGA_MAC_VER_11)
+- /* special workaround needed */
+- tp->irq_mask |= RxFIFOOver;
+ }
+
+ static int rtl_alloc_irq(struct rtl8169_private *tp)
+@@ -5295,7 +5284,6 @@ static int rtl_jumbo_max(struct rtl8169_
+ case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
+ return JUMBO_7K;
+ /* RTL8168b */
+- case RTL_GIGA_MAC_VER_11:
+ case RTL_GIGA_MAC_VER_17:
+ return JUMBO_4K;
+ /* RTL8168c */
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -276,15 +276,6 @@ static void rtl8169sce_hw_phy_config(str
+ rtl_writephy_batch(phydev, phy_reg_init);
+ }
+
+-static void rtl8168bb_hw_phy_config(struct rtl8169_private *tp,
+- struct phy_device *phydev)
+-{
+- phy_write(phydev, 0x1f, 0x0001);
+- phy_set_bits(phydev, 0x16, BIT(0));
+- phy_write(phydev, 0x10, 0xf41b);
+- phy_write(phydev, 0x1f, 0x0000);
+-}
+-
+ static void rtl8168bef_hw_phy_config(struct rtl8169_private *tp,
+ struct phy_device *phydev)
+ {
+@@ -1136,7 +1127,6 @@ void r8169_hw_phy_config(struct rtl8169_
+ [RTL_GIGA_MAC_VER_08] = rtl8102e_hw_phy_config,
+ [RTL_GIGA_MAC_VER_09] = rtl8102e_hw_phy_config,
+ [RTL_GIGA_MAC_VER_10] = NULL,
+- [RTL_GIGA_MAC_VER_11] = rtl8168bb_hw_phy_config,
+ [RTL_GIGA_MAC_VER_14] = rtl8401_hw_phy_config,
+ [RTL_GIGA_MAC_VER_17] = rtl8168bef_hw_phy_config,
+ [RTL_GIGA_MAC_VER_18] = rtl8168cp_1_hw_phy_config,
--- /dev/null
+From b299ea0069284186b0d3d54aebe87f0d195d457a Mon Sep 17 00:00:00 2001
+Date: Fri, 13 Dec 2024 20:01:41 +0100
+Subject: [PATCH] r8169: adjust version numbering for RTL8126
+
+Adjust version numbering for RTL8126, so that it doesn't overlap with
+new RTL8125 versions.
+
+---
+ drivers/net/ethernet/realtek/r8169.h | 4 +-
+ drivers/net/ethernet/realtek/r8169_main.c | 62 +++++++++----------
+ .../net/ethernet/realtek/r8169_phy_config.c | 4 +-
+ 3 files changed, 35 insertions(+), 35 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169.h
++++ b/drivers/net/ethernet/realtek/r8169.h
+@@ -69,8 +69,8 @@ enum mac_version {
+ RTL_GIGA_MAC_VER_61,
+ RTL_GIGA_MAC_VER_63,
+ RTL_GIGA_MAC_VER_64,
+- RTL_GIGA_MAC_VER_65,
+- RTL_GIGA_MAC_VER_66,
++ RTL_GIGA_MAC_VER_70,
++ RTL_GIGA_MAC_VER_71,
+ RTL_GIGA_MAC_NONE
+ };
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -139,8 +139,8 @@ static const struct {
+ /* reserve 62 for CFG_METHOD_4 in the vendor driver */
+ [RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
+ [RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
+- [RTL_GIGA_MAC_VER_65] = {"RTL8126A", FIRMWARE_8126A_2},
+- [RTL_GIGA_MAC_VER_66] = {"RTL8126A", FIRMWARE_8126A_3},
++ [RTL_GIGA_MAC_VER_70] = {"RTL8126A", FIRMWARE_8126A_2},
++ [RTL_GIGA_MAC_VER_71] = {"RTL8126A", FIRMWARE_8126A_3},
+ };
+
+ static const struct pci_device_id rtl8169_pci_tbl[] = {
+@@ -1227,7 +1227,7 @@ static void rtl_writephy(struct rtl8169_
+ case RTL_GIGA_MAC_VER_31:
+ r8168dp_2_mdio_write(tp, location, val);
+ break;
+- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
+ r8168g_mdio_write(tp, location, val);
+ break;
+ default:
+@@ -1242,7 +1242,7 @@ static int rtl_readphy(struct rtl8169_pr
+ case RTL_GIGA_MAC_VER_28:
+ case RTL_GIGA_MAC_VER_31:
+ return r8168dp_2_mdio_read(tp, location);
+- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
+ return r8168g_mdio_read(tp, location);
+ default:
+ return r8169_mdio_read(tp, location);
+@@ -1573,7 +1573,7 @@ static void __rtl8169_set_wol(struct rtl
+ break;
+ case RTL_GIGA_MAC_VER_34:
+ case RTL_GIGA_MAC_VER_37:
+- case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_71:
+ r8169_mod_reg8_cond(tp, Config2, PME_SIGNAL, wolopts);
+ break;
+ default:
+@@ -2046,7 +2046,7 @@ static void rtl_set_eee_txidle_timer(str
+ tp->tx_lpi_timer = timer_val;
+ r8168_mac_ocp_write(tp, 0xe048, timer_val);
+ break;
+- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
+ tp->tx_lpi_timer = timer_val;
+ RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
+ break;
+@@ -2254,8 +2254,8 @@ static enum mac_version rtl8169_get_mac_
+ enum mac_version ver;
+ } mac_info[] = {
+ /* 8126A family. */
+- { 0x7cf, 0x64a, RTL_GIGA_MAC_VER_66 },
+- { 0x7cf, 0x649, RTL_GIGA_MAC_VER_65 },
++ { 0x7cf, 0x64a, RTL_GIGA_MAC_VER_71 },
++ { 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
+
+ /* 8125D family. */
+ { 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
+@@ -2525,7 +2525,7 @@ static void rtl_init_rxcfg(struct rtl816
+ case RTL_GIGA_MAC_VER_61:
+ RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
+ break;
+- case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_71:
+ RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
+ RX_PAUSE_SLOT_ON);
+ break;
+@@ -2657,7 +2657,7 @@ static void rtl_wait_txrx_fifo_empty(str
+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_61:
+ rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
+ break;
+- case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_71:
+ RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
+ rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
+ rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond_2, 100, 42);
+@@ -2900,7 +2900,7 @@ static void rtl_enable_exit_l1(struct rt
+ case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_38:
+ rtl_eri_set_bits(tp, 0xd4, 0x0c00);
+ break;
+- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
+ r8168_mac_ocp_modify(tp, 0xc0ac, 0, 0x1f80);
+ break;
+ default:
+@@ -2914,7 +2914,7 @@ static void rtl_disable_exit_l1(struct r
+ case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38:
+ rtl_eri_clear_bits(tp, 0xd4, 0x1f00);
+ break;
+- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
+ r8168_mac_ocp_modify(tp, 0xc0ac, 0x1f80, 0);
+ break;
+ default:
+@@ -2940,8 +2940,8 @@ static void rtl_hw_aspm_clkreq_enable(st
+
+ rtl_mod_config5(tp, 0, ASPM_en);
+ switch (tp->mac_version) {
+- case RTL_GIGA_MAC_VER_65:
+- case RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_70:
++ case RTL_GIGA_MAC_VER_71:
+ val8 = RTL_R8(tp, INT_CFG0_8125) | INT_CFG0_CLKREQEN;
+ RTL_W8(tp, INT_CFG0_8125, val8);
+ break;
+@@ -2952,7 +2952,7 @@ static void rtl_hw_aspm_clkreq_enable(st
+
+ switch (tp->mac_version) {
+ case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
+- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
+ /* reset ephy tx/rx disable timer */
+ r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0);
+ /* chip can trigger L1.2 */
+@@ -2964,7 +2964,7 @@ static void rtl_hw_aspm_clkreq_enable(st
+ } else {
+ switch (tp->mac_version) {
+ case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
+- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
+ r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0);
+ break;
+ default:
+@@ -2972,8 +2972,8 @@ static void rtl_hw_aspm_clkreq_enable(st
+ }
+
+ switch (tp->mac_version) {
+- case RTL_GIGA_MAC_VER_65:
+- case RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_70:
++ case RTL_GIGA_MAC_VER_71:
+ val8 = RTL_R8(tp, INT_CFG0_8125) & ~INT_CFG0_CLKREQEN;
+ RTL_W8(tp, INT_CFG0_8125, val8);
+ break;
+@@ -3693,12 +3693,12 @@ static void rtl_hw_start_8125_common(str
+ /* disable new tx descriptor format */
+ r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000);
+
+- if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
+- tp->mac_version == RTL_GIGA_MAC_VER_66)
++ if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
++ tp->mac_version == RTL_GIGA_MAC_VER_71)
+ RTL_W8(tp, 0xD8, RTL_R8(tp, 0xD8) & ~0x02);
+
+- if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
+- tp->mac_version == RTL_GIGA_MAC_VER_66)
++ if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
++ tp->mac_version == RTL_GIGA_MAC_VER_71)
+ r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400);
+ else if (tp->mac_version == RTL_GIGA_MAC_VER_63)
+ r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200);
+@@ -3716,8 +3716,8 @@ static void rtl_hw_start_8125_common(str
+ r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0030);
+ r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000);
+ r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001);
+- if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
+- tp->mac_version == RTL_GIGA_MAC_VER_66)
++ if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
++ tp->mac_version == RTL_GIGA_MAC_VER_71)
+ r8168_mac_ocp_modify(tp, 0xea1c, 0x0300, 0x0000);
+ else
+ r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000);
+@@ -3836,8 +3836,8 @@ static void rtl_hw_config(struct rtl8169
+ [RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
+ [RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
+ [RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
+- [RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,
+- [RTL_GIGA_MAC_VER_66] = rtl_hw_start_8126a,
++ [RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
++ [RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
+ };
+
+ if (hw_configs[tp->mac_version])
+@@ -3858,8 +3858,8 @@ static void rtl_hw_start_8125(struct rtl
+ RTL_W32(tp, i, 0);
+ break;
+ case RTL_GIGA_MAC_VER_63:
+- case RTL_GIGA_MAC_VER_65:
+- case RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_70:
++ case RTL_GIGA_MAC_VER_71:
+ for (i = 0xa00; i < 0xa80; i += 4)
+ RTL_W32(tp, i, 0);
+ RTL_W16(tp, INT_CFG1_8125, 0x0000);
+@@ -4091,7 +4091,7 @@ static void rtl8169_cleanup(struct rtl81
+ RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
+ rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
+ break;
+- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
+ rtl_enable_rxdvgate(tp);
+ fsleep(2000);
+ break;
+@@ -4248,7 +4248,7 @@ static unsigned int rtl_quirk_packet_pad
+
+ switch (tp->mac_version) {
+ case RTL_GIGA_MAC_VER_34:
+- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
+ padto = max_t(unsigned int, padto, ETH_ZLEN);
+ break;
+ default:
+@@ -5265,7 +5265,7 @@ static void rtl_hw_initialize(struct rtl
+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:
+ rtl_hw_init_8168g(tp);
+ break;
+- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
++ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
+ rtl_hw_init_8125(tp);
+ break;
+ default:
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -1162,8 +1162,8 @@ void r8169_hw_phy_config(struct rtl8169_
+ [RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
+ [RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
+ [RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
+- [RTL_GIGA_MAC_VER_65] = rtl8126a_hw_phy_config,
+- [RTL_GIGA_MAC_VER_66] = rtl8126a_hw_phy_config,
++ [RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
++ [RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
+ };
+
+ if (phy_configs[ver])
--- /dev/null
+From b3593df26ab19f114d613693fa8a92ab202803d0 Mon Sep 17 00:00:00 2001
+Date: Fri, 13 Dec 2024 20:02:58 +0100
+Subject: [PATCH] r8169: add support for RTL8125D rev.b
+
+Add support for RTL8125D rev.b. Its XID is 0x689. It is basically
+based on the one with XID 0x688, but with different firmware file.
+
+---
+ drivers/net/ethernet/realtek/r8169.h | 1 +
+ drivers/net/ethernet/realtek/r8169_main.c | 6 ++++++
+ drivers/net/ethernet/realtek/r8169_phy_config.c | 1 +
+ 3 files changed, 8 insertions(+)
+
+--- a/drivers/net/ethernet/realtek/r8169.h
++++ b/drivers/net/ethernet/realtek/r8169.h
+@@ -69,6 +69,7 @@ enum mac_version {
+ RTL_GIGA_MAC_VER_61,
+ RTL_GIGA_MAC_VER_63,
+ RTL_GIGA_MAC_VER_64,
++ RTL_GIGA_MAC_VER_65,
+ RTL_GIGA_MAC_VER_70,
+ RTL_GIGA_MAC_VER_71,
+ RTL_GIGA_MAC_NONE
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -56,6 +56,7 @@
+ #define FIRMWARE_8125A_3 "rtl_nic/rtl8125a-3.fw"
+ #define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
+ #define FIRMWARE_8125D_1 "rtl_nic/rtl8125d-1.fw"
++#define FIRMWARE_8125D_2 "rtl_nic/rtl8125d-2.fw"
+ #define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw"
+ #define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw"
+
+@@ -139,6 +140,7 @@ static const struct {
+ /* reserve 62 for CFG_METHOD_4 in the vendor driver */
+ [RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
+ [RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
++ [RTL_GIGA_MAC_VER_65] = {"RTL8125D", FIRMWARE_8125D_2},
+ [RTL_GIGA_MAC_VER_70] = {"RTL8126A", FIRMWARE_8126A_2},
+ [RTL_GIGA_MAC_VER_71] = {"RTL8126A", FIRMWARE_8126A_3},
+ };
+@@ -705,6 +707,7 @@ MODULE_FIRMWARE(FIRMWARE_8107E_2);
+ MODULE_FIRMWARE(FIRMWARE_8125A_3);
+ MODULE_FIRMWARE(FIRMWARE_8125B_2);
+ MODULE_FIRMWARE(FIRMWARE_8125D_1);
++MODULE_FIRMWARE(FIRMWARE_8125D_2);
+ MODULE_FIRMWARE(FIRMWARE_8126A_2);
+ MODULE_FIRMWARE(FIRMWARE_8126A_3);
+
+@@ -2258,6 +2261,7 @@ static enum mac_version rtl8169_get_mac_
+ { 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
+
+ /* 8125D family. */
++ { 0x7cf, 0x689, RTL_GIGA_MAC_VER_65 },
+ { 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
+
+ /* 8125B family. */
+@@ -3836,6 +3840,7 @@ static void rtl_hw_config(struct rtl8169
+ [RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
+ [RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
+ [RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
++ [RTL_GIGA_MAC_VER_65] = rtl_hw_start_8125d,
+ [RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
+ [RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
+ };
+@@ -3854,6 +3859,7 @@ static void rtl_hw_start_8125(struct rtl
+ switch (tp->mac_version) {
+ case RTL_GIGA_MAC_VER_61:
+ case RTL_GIGA_MAC_VER_64:
++ case RTL_GIGA_MAC_VER_65:
+ for (i = 0xa00; i < 0xb00; i += 4)
+ RTL_W32(tp, i, 0);
+ break;
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -1162,6 +1162,7 @@ void r8169_hw_phy_config(struct rtl8169_
+ [RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
+ [RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
+ [RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
++ [RTL_GIGA_MAC_VER_65] = rtl8125d_hw_phy_config,
+ [RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
+ [RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
+ };
+++ /dev/null
-From 854d71c555dfc3383c1fde7d9989b6046e21093d Mon Sep 17 00:00:00 2001
-Date: Wed, 9 Oct 2024 07:48:05 +0200
-Subject: [PATCH] r8169: remove original workaround for RTL8125 broken rx issue
-
-Now that we have b9c7ac4fe22c ("r8169: disable ALDPS per default for
-RTL8125"), the first attempt to fix the issue shouldn't be needed
-any longer. So let's effectively revert 621735f59064 ("r8169: fix
-rare issue with broken rx after link-down on RTL8125") and see
-whether anybody complains.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 4 ----
- 1 file changed, 4 deletions(-)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -4777,11 +4777,7 @@ static void r8169_phylink_handler(struct
- if (netif_carrier_ok(ndev)) {
- rtl_link_chg_patch(tp);
- pm_request_resume(d);
-- netif_wake_queue(tp->dev);
- } else {
-- /* In few cases rx is broken after link-down otherwise */
-- if (rtl_is_8125(tp))
-- rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE);
- pm_runtime_idle(d);
- }
-
--- /dev/null
+From b11bff90f2ad52c5c55c822ecd20326619a73898 Mon Sep 17 00:00:00 2001
+Date: Tue, 7 Jan 2025 14:43:55 +0800
+Subject: [PATCH] r8169: add support for RTL8125BP rev.b
+
+Add support for RTL8125BP rev.b. Its XID is 0x689. This chip supports
+DASH and its dash type is "RTL_DASH_25_BP".
+
+---
+ drivers/net/ethernet/realtek/r8169.h | 1 +
+ drivers/net/ethernet/realtek/r8169_main.c | 30 +++++++++++++++++++
+ .../net/ethernet/realtek/r8169_phy_config.c | 23 ++++++++++++++
+ 3 files changed, 54 insertions(+)
+
+--- a/drivers/net/ethernet/realtek/r8169.h
++++ b/drivers/net/ethernet/realtek/r8169.h
+@@ -70,6 +70,7 @@ enum mac_version {
+ RTL_GIGA_MAC_VER_63,
+ RTL_GIGA_MAC_VER_64,
+ RTL_GIGA_MAC_VER_65,
++ RTL_GIGA_MAC_VER_66,
+ RTL_GIGA_MAC_VER_70,
+ RTL_GIGA_MAC_VER_71,
+ RTL_GIGA_MAC_NONE
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -57,6 +57,7 @@
+ #define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
+ #define FIRMWARE_8125D_1 "rtl_nic/rtl8125d-1.fw"
+ #define FIRMWARE_8125D_2 "rtl_nic/rtl8125d-2.fw"
++#define FIRMWARE_8125BP_2 "rtl_nic/rtl8125bp-2.fw"
+ #define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw"
+ #define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw"
+
+@@ -141,6 +142,7 @@ static const struct {
+ [RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
+ [RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
+ [RTL_GIGA_MAC_VER_65] = {"RTL8125D", FIRMWARE_8125D_2},
++ [RTL_GIGA_MAC_VER_66] = {"RTL8125BP", FIRMWARE_8125BP_2},
+ [RTL_GIGA_MAC_VER_70] = {"RTL8126A", FIRMWARE_8126A_2},
+ [RTL_GIGA_MAC_VER_71] = {"RTL8126A", FIRMWARE_8126A_3},
+ };
+@@ -631,6 +633,7 @@ enum rtl_dash_type {
+ RTL_DASH_NONE,
+ RTL_DASH_DP,
+ RTL_DASH_EP,
++ RTL_DASH_25_BP,
+ };
+
+ struct rtl8169_private {
+@@ -708,6 +711,7 @@ MODULE_FIRMWARE(FIRMWARE_8125A_3);
+ MODULE_FIRMWARE(FIRMWARE_8125B_2);
+ MODULE_FIRMWARE(FIRMWARE_8125D_1);
+ MODULE_FIRMWARE(FIRMWARE_8125D_2);
++MODULE_FIRMWARE(FIRMWARE_8125BP_2);
+ MODULE_FIRMWARE(FIRMWARE_8126A_2);
+ MODULE_FIRMWARE(FIRMWARE_8126A_3);
+
+@@ -1360,10 +1364,19 @@ static void rtl8168ep_driver_start(struc
+ rtl_loop_wait_high(tp, &rtl_ep_ocp_read_cond, 10000, 30);
+ }
+
++static void rtl8125bp_driver_start(struct rtl8169_private *tp)
++{
++ r8168ep_ocp_write(tp, 0x01, 0x14, OOB_CMD_DRIVER_START);
++ r8168ep_ocp_write(tp, 0x01, 0x18, 0x00);
++ r8168ep_ocp_write(tp, 0x01, 0x10, 0x01);
++}
++
+ static void rtl8168_driver_start(struct rtl8169_private *tp)
+ {
+ if (tp->dash_type == RTL_DASH_DP)
+ rtl8168dp_driver_start(tp);
++ else if (tp->dash_type == RTL_DASH_25_BP)
++ rtl8125bp_driver_start(tp);
+ else
+ rtl8168ep_driver_start(tp);
+ }
+@@ -1384,10 +1397,19 @@ static void rtl8168ep_driver_stop(struct
+ rtl_loop_wait_low(tp, &rtl_ep_ocp_read_cond, 10000, 10);
+ }
+
++static void rtl8125bp_driver_stop(struct rtl8169_private *tp)
++{
++ r8168ep_ocp_write(tp, 0x01, 0x14, OOB_CMD_DRIVER_STOP);
++ r8168ep_ocp_write(tp, 0x01, 0x18, 0x00);
++ r8168ep_ocp_write(tp, 0x01, 0x10, 0x01);
++}
++
+ static void rtl8168_driver_stop(struct rtl8169_private *tp)
+ {
+ if (tp->dash_type == RTL_DASH_DP)
+ rtl8168dp_driver_stop(tp);
++ else if (tp->dash_type == RTL_DASH_25_BP)
++ rtl8125bp_driver_stop(tp);
+ else
+ rtl8168ep_driver_stop(tp);
+ }
+@@ -1410,6 +1432,7 @@ static bool rtl_dash_is_enabled(struct r
+ case RTL_DASH_DP:
+ return r8168dp_check_dash(tp);
+ case RTL_DASH_EP:
++ case RTL_DASH_25_BP:
+ return r8168ep_check_dash(tp);
+ default:
+ return false;
+@@ -1424,6 +1447,8 @@ static enum rtl_dash_type rtl_get_dash_t
+ return RTL_DASH_DP;
+ case RTL_GIGA_MAC_VER_51 ... RTL_GIGA_MAC_VER_53:
+ return RTL_DASH_EP;
++ case RTL_GIGA_MAC_VER_66:
++ return RTL_DASH_25_BP;
+ default:
+ return RTL_DASH_NONE;
+ }
+@@ -2260,6 +2285,9 @@ static enum mac_version rtl8169_get_mac_
+ { 0x7cf, 0x64a, RTL_GIGA_MAC_VER_71 },
+ { 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
+
++ /* 8125BP family. */
++ { 0x7cf, 0x681, RTL_GIGA_MAC_VER_66 },
++
+ /* 8125D family. */
+ { 0x7cf, 0x689, RTL_GIGA_MAC_VER_65 },
+ { 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
+@@ -3841,6 +3869,7 @@ static void rtl_hw_config(struct rtl8169
+ [RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
+ [RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
+ [RTL_GIGA_MAC_VER_65] = rtl_hw_start_8125d,
++ [RTL_GIGA_MAC_VER_66] = rtl_hw_start_8125d,
+ [RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
+ [RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
+ };
+@@ -3860,6 +3889,7 @@ static void rtl_hw_start_8125(struct rtl
+ case RTL_GIGA_MAC_VER_61:
+ case RTL_GIGA_MAC_VER_64:
+ case RTL_GIGA_MAC_VER_65:
++ case RTL_GIGA_MAC_VER_66:
+ for (i = 0xa00; i < 0xb00; i += 4)
+ RTL_W32(tp, i, 0);
+ break;
+--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
++++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
+@@ -1102,6 +1102,28 @@ static void rtl8125d_hw_phy_config(struc
+ rtl8125_config_eee_phy(phydev);
+ }
+
++static void rtl8125bp_hw_phy_config(struct rtl8169_private *tp,
++ struct phy_device *phydev)
++{
++ r8169_apply_firmware(tp);
++ rtl8168g_enable_gphy_10m(phydev);
++
++ r8168g_phy_param(phydev, 0x8010, 0x0800, 0x0000);
++
++ phy_write(phydev, 0x1f, 0x0b87);
++ phy_write(phydev, 0x16, 0x8088);
++ phy_modify(phydev, 0x17, 0xff00, 0x9000);
++ phy_write(phydev, 0x16, 0x808f);
++ phy_modify(phydev, 0x17, 0xff00, 0x9000);
++ phy_write(phydev, 0x1f, 0x0000);
++
++ r8168g_phy_param(phydev, 0x8174, 0x2000, 0x1800);
++
++ rtl8125_legacy_force_mode(phydev);
++ rtl8168g_disable_aldps(phydev);
++ rtl8125_config_eee_phy(phydev);
++}
++
+ static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,
+ struct phy_device *phydev)
+ {
+@@ -1163,6 +1185,7 @@ void r8169_hw_phy_config(struct rtl8169_
+ [RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
+ [RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
+ [RTL_GIGA_MAC_VER_65] = rtl8125d_hw_phy_config,
++ [RTL_GIGA_MAC_VER_66] = rtl8125bp_hw_phy_config,
+ [RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
+ [RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
+ };
+++ /dev/null
-From b8bf38440ba94e8ed8e2ae55c5dfb0276d30e843 Mon Sep 17 00:00:00 2001
-Date: Thu, 10 Oct 2024 12:58:02 +0200
-Subject: [PATCH] r8169: enable SG/TSO on selected chip versions per default
-
-Due to problem reports in the past SG and TSO/TSO6 are disabled per
-default. It's not fully clear which chip versions are affected, so we
-may impact also users of unaffected chip versions, unless they know
-how to use ethtool for enabling SG/TSO/TSO6.
-Vendor drivers r8168/r8125 enable SG/TSO/TSO6 for selected chip
-versions per default, I'd interpret this as confirmation that these
-chip versions are unaffected. So let's do the same here.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 16 +++++++++++-----
- 1 file changed, 11 insertions(+), 5 deletions(-)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5489,11 +5489,6 @@ static int rtl_init_one(struct pci_dev *
-
- dev->features |= dev->hw_features;
-
-- /* There has been a number of reports that using SG/TSO results in
-- * tx timeouts. However for a lot of people SG/TSO works fine.
-- * Therefore disable both features by default, but allow users to
-- * enable them. Use at own risk!
-- */
- if (rtl_chip_supports_csum_v2(tp)) {
- dev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6;
- netif_set_tso_max_size(dev, RTL_GSO_MAX_SIZE_V2);
-@@ -5504,6 +5499,17 @@ static int rtl_init_one(struct pci_dev *
- netif_set_tso_max_segs(dev, RTL_GSO_MAX_SEGS_V1);
- }
-
-+ /* There has been a number of reports that using SG/TSO results in
-+ * tx timeouts. However for a lot of people SG/TSO works fine.
-+ * It's not fully clear which chip versions are affected. Vendor
-+ * drivers enable SG/TSO for certain chip versions per default,
-+ * let's mimic this here. On other chip versions users can
-+ * use ethtool to enable SG/TSO, use at own risk!
-+ */
-+ if (tp->mac_version >= RTL_GIGA_MAC_VER_46 &&
-+ tp->mac_version != RTL_GIGA_MAC_VER_61)
-+ dev->features |= dev->hw_features;
-+
- dev->hw_features |= NETIF_F_RXALL;
- dev->hw_features |= NETIF_F_RXFCS;
-
--- /dev/null
+From 135c3c86a7cef4ba3d368da15b16c275b74582d3 Mon Sep 17 00:00:00 2001
+Date: Mon, 3 Feb 2025 21:35:24 +0100
+Subject: [PATCH] r8169: make Kconfig option for LED support user-visible
+
+Make config option R8169_LEDS user-visible, so that users can remove
+support if not needed.
+
+---
+ drivers/net/ethernet/realtek/Kconfig | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/realtek/Kconfig
++++ b/drivers/net/ethernet/realtek/Kconfig
+@@ -114,7 +114,8 @@ config R8169
+ will be called r8169. This is recommended.
+
+ config R8169_LEDS
+- def_bool R8169 && LEDS_TRIGGER_NETDEV
++ bool "Support for controlling the NIC LEDs"
++ depends on R8169 && LEDS_TRIGGER_NETDEV
+ depends on !(R8169=y && LEDS_CLASS=m)
+ help
+ Optional support for controlling the NIC LED's with the netdev
+++ /dev/null
-From e3fc5139bd8ffaa1498adc21be4e8ecbc6aed508 Mon Sep 17 00:00:00 2001
-Date: Sun, 13 Oct 2024 11:17:39 +0200
-Subject: [PATCH] r8169: implement additional ethtool stats ops
-
-This adds support for ethtool standard statistics, and makes use of the
-extended hardware statistics being available from RTl8125.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 82 +++++++++++++++++++++++
- 1 file changed, 82 insertions(+)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -2160,6 +2160,19 @@ static void rtl8169_get_ringparam(struct
- data->tx_pending = NUM_TX_DESC;
- }
-
-+static void rtl8169_get_pause_stats(struct net_device *dev,
-+ struct ethtool_pause_stats *pause_stats)
-+{
-+ struct rtl8169_private *tp = netdev_priv(dev);
-+
-+ if (!rtl_is_8125(tp))
-+ return;
-+
-+ rtl8169_update_counters(tp);
-+ pause_stats->tx_pause_frames = le32_to_cpu(tp->counters->tx_pause_on);
-+ pause_stats->rx_pause_frames = le32_to_cpu(tp->counters->rx_pause_on);
-+}
-+
- static void rtl8169_get_pauseparam(struct net_device *dev,
- struct ethtool_pauseparam *data)
- {
-@@ -2186,6 +2199,69 @@ static int rtl8169_set_pauseparam(struct
- return 0;
- }
-
-+static void rtl8169_get_eth_mac_stats(struct net_device *dev,
-+ struct ethtool_eth_mac_stats *mac_stats)
-+{
-+ struct rtl8169_private *tp = netdev_priv(dev);
-+
-+ rtl8169_update_counters(tp);
-+
-+ mac_stats->FramesTransmittedOK =
-+ le64_to_cpu(tp->counters->tx_packets);
-+ mac_stats->SingleCollisionFrames =
-+ le32_to_cpu(tp->counters->tx_one_collision);
-+ mac_stats->MultipleCollisionFrames =
-+ le32_to_cpu(tp->counters->tx_multi_collision);
-+ mac_stats->FramesReceivedOK =
-+ le64_to_cpu(tp->counters->rx_packets);
-+ mac_stats->AlignmentErrors =
-+ le16_to_cpu(tp->counters->align_errors);
-+ mac_stats->FramesLostDueToIntMACXmitError =
-+ le64_to_cpu(tp->counters->tx_errors);
-+ mac_stats->BroadcastFramesReceivedOK =
-+ le64_to_cpu(tp->counters->rx_broadcast);
-+ mac_stats->MulticastFramesReceivedOK =
-+ le32_to_cpu(tp->counters->rx_multicast);
-+
-+ if (!rtl_is_8125(tp))
-+ return;
-+
-+ mac_stats->AlignmentErrors =
-+ le32_to_cpu(tp->counters->align_errors32);
-+ mac_stats->OctetsTransmittedOK =
-+ le64_to_cpu(tp->counters->tx_octets);
-+ mac_stats->LateCollisions =
-+ le32_to_cpu(tp->counters->tx_late_collision);
-+ mac_stats->FramesAbortedDueToXSColls =
-+ le32_to_cpu(tp->counters->tx_aborted32);
-+ mac_stats->OctetsReceivedOK =
-+ le64_to_cpu(tp->counters->rx_octets);
-+ mac_stats->FramesLostDueToIntMACRcvError =
-+ le32_to_cpu(tp->counters->rx_mac_error);
-+ mac_stats->MulticastFramesXmittedOK =
-+ le64_to_cpu(tp->counters->tx_multicast64);
-+ mac_stats->BroadcastFramesXmittedOK =
-+ le64_to_cpu(tp->counters->tx_broadcast64);
-+ mac_stats->MulticastFramesReceivedOK =
-+ le64_to_cpu(tp->counters->rx_multicast64);
-+ mac_stats->FrameTooLongErrors =
-+ le32_to_cpu(tp->counters->rx_frame_too_long);
-+}
-+
-+static void rtl8169_get_eth_ctrl_stats(struct net_device *dev,
-+ struct ethtool_eth_ctrl_stats *ctrl_stats)
-+{
-+ struct rtl8169_private *tp = netdev_priv(dev);
-+
-+ if (!rtl_is_8125(tp))
-+ return;
-+
-+ rtl8169_update_counters(tp);
-+
-+ ctrl_stats->UnsupportedOpcodesReceived =
-+ le32_to_cpu(tp->counters->rx_unknown_opcode);
-+}
-+
- static const struct ethtool_ops rtl8169_ethtool_ops = {
- .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
- ETHTOOL_COALESCE_MAX_FRAMES,
-@@ -2207,8 +2283,11 @@ static const struct ethtool_ops rtl8169_
- .get_link_ksettings = phy_ethtool_get_link_ksettings,
- .set_link_ksettings = phy_ethtool_set_link_ksettings,
- .get_ringparam = rtl8169_get_ringparam,
-+ .get_pause_stats = rtl8169_get_pause_stats,
- .get_pauseparam = rtl8169_get_pauseparam,
- .set_pauseparam = rtl8169_set_pauseparam,
-+ .get_eth_mac_stats = rtl8169_get_eth_mac_stats,
-+ .get_eth_ctrl_stats = rtl8169_get_eth_ctrl_stats,
- };
-
- static enum mac_version rtl8169_get_mac_version(u16 xid, bool gmii)
-@@ -3893,6 +3972,9 @@ static void rtl_hw_start_8125(struct rtl
- break;
- }
-
-+ /* enable extended tally counter */
-+ r8168_mac_ocp_modify(tp, 0xea84, 0, BIT(1) | BIT(0));
-+
- rtl_hw_config(tp);
- }
-
--- /dev/null
+From faac69a4ae5abb49e62c79c66b51bb905c9aa5ec Mon Sep 17 00:00:00 2001
+Date: Tue, 4 Feb 2025 07:58:17 +0100
+Subject: [PATCH] r8169: don't scan PHY addresses > 0
+
+The PHY address is a dummy, because r8169 PHY access registers
+don't support a PHY address. Therefore scan address 0 only.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -5222,6 +5222,7 @@ static int r8169_mdio_register(struct rt
+ new_bus->priv = tp;
+ new_bus->parent = &pdev->dev;
+ new_bus->irq[0] = PHY_MAC_INTERRUPT;
++ new_bus->phy_mask = GENMASK(31, 1);
+ snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x-%x",
+ pci_domain_nr(pdev->bus), pci_dev_id(pdev));
+
+++ /dev/null
-From ac48430368c1a4f4e6c2fa92243b4b93fd25bee4 Mon Sep 17 00:00:00 2001
-Date: Wed, 16 Oct 2024 22:05:57 +0200
-Subject: [PATCH] r8169: don't take RTNL lock in rtl_task()
-
-There's not really a benefit here in taking the RTNL lock. The task
-handler does exception handling only, so we're in trouble anyway when
-we come here, and there's no need to protect against e.g. a parallel
-ethtool call.
-A benefit of removing the RTNL lock here is that we now can
-synchronously cancel the workqueue from a context holding the RTNL mutex.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 8 ++------
- 1 file changed, 2 insertions(+), 6 deletions(-)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -4800,10 +4800,8 @@ static void rtl_task(struct work_struct
- container_of(work, struct rtl8169_private, wk.work);
- int ret;
-
-- rtnl_lock();
--
- if (!test_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags))
-- goto out_unlock;
-+ return;
-
- if (test_and_clear_bit(RTL_FLAG_TASK_TX_TIMEOUT, tp->wk.flags)) {
- /* if chip isn't accessible, reset bus to revive it */
-@@ -4812,7 +4810,7 @@ static void rtl_task(struct work_struct
- if (ret < 0) {
- netdev_err(tp->dev, "Can't reset secondary PCI bus, detach NIC\n");
- netif_device_detach(tp->dev);
-- goto out_unlock;
-+ return;
- }
- }
-
-@@ -4831,8 +4829,6 @@ reset:
- } else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp->wk.flags)) {
- rtl_reset_work(tp);
- }
--out_unlock:
-- rtnl_unlock();
- }
-
- static int rtl8169_poll(struct napi_struct *napi, int budget)
--- /dev/null
+From d30460f42675fef5cd4b44ffbc49b545524555e3 Mon Sep 17 00:00:00 2001
+Date: Wed, 12 Feb 2025 08:03:56 +0100
+Subject: [PATCH] r8169: add support for Intel Killer E5000
+
+This adds support for the Intel Killer E5000 which seems to be a
+rebranded RTL8126. Copied from r8126 vendor driver.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -169,6 +169,7 @@ static const struct pci_device_id rtl816
+ { PCI_VDEVICE(REALTEK, 0x8125) },
+ { PCI_VDEVICE(REALTEK, 0x8126) },
+ { PCI_VDEVICE(REALTEK, 0x3000) },
++ { PCI_VDEVICE(REALTEK, 0x5000) },
+ {}
+ };
+
--- /dev/null
+From 853e80369cfceb2331bf34f251ba11c6602cc67f Mon Sep 17 00:00:00 2001
+Date: Thu, 13 Feb 2025 20:15:42 +0100
+Subject: [PATCH] r8169: add PHY c45 ops for MDIO_MMD_VENDOR2 registers
+
+The integrated PHYs on chip versions from RTL8168g allow to address
+MDIO_MMD_VEND2 registers. All c22 standard registers are mapped to
+MDIO_MMD_VEND2 registers. So far the paging mechanism is used to
+address PHY registers. Add support for c45 ops to address MDIO_MMD_VEND2
+registers directly, w/o the paging.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 32 +++++++++++++++++++++++
+ 1 file changed, 32 insertions(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -5200,6 +5200,33 @@ static int r8169_mdio_write_reg(struct m
+ return 0;
+ }
+
++static int r8169_mdio_read_reg_c45(struct mii_bus *mii_bus, int addr,
++ int devnum, int regnum)
++{
++ struct rtl8169_private *tp = mii_bus->priv;
++
++ if (addr > 0)
++ return -ENODEV;
++
++ if (devnum == MDIO_MMD_VEND2 && regnum > MDIO_STAT2)
++ return r8168_phy_ocp_read(tp, regnum);
++
++ return 0;
++}
++
++static int r8169_mdio_write_reg_c45(struct mii_bus *mii_bus, int addr,
++ int devnum, int regnum, u16 val)
++{
++ struct rtl8169_private *tp = mii_bus->priv;
++
++ if (addr > 0 || devnum != MDIO_MMD_VEND2 || regnum <= MDIO_STAT2)
++ return -ENODEV;
++
++ r8168_phy_ocp_write(tp, regnum, val);
++
++ return 0;
++}
++
+ static int r8169_mdio_register(struct rtl8169_private *tp)
+ {
+ struct pci_dev *pdev = tp->pci_dev;
+@@ -5230,6 +5257,11 @@ static int r8169_mdio_register(struct rt
+ new_bus->read = r8169_mdio_read_reg;
+ new_bus->write = r8169_mdio_write_reg;
+
++ if (tp->mac_version >= RTL_GIGA_MAC_VER_40) {
++ new_bus->read_c45 = r8169_mdio_read_reg_c45;
++ new_bus->write_c45 = r8169_mdio_write_reg_c45;
++ }
++
+ ret = devm_mdiobus_register(&pdev->dev, new_bus);
+ if (ret)
+ return ret;
+++ /dev/null
-From 1c105bacb160b5918e917ab811552b7be69fc69c Mon Sep 17 00:00:00 2001
-Date: Wed, 16 Oct 2024 22:29:39 +0200
-Subject: [PATCH] r8169: avoid duplicated messages if loading firmware fails
- and switch to warn level
-
-In case of a problem with firmware loading we inform at the driver level,
-in addition the firmware load code itself issues warnings. Therefore
-switch to firmware_request_nowarn() to avoid duplicated error messages.
-In addition switch to warn level because the firmware is optional and
-typically just fixes compatibility issues.
-
----
- drivers/net/ethernet/realtek/r8169_firmware.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/net/ethernet/realtek/r8169_firmware.c
-+++ b/drivers/net/ethernet/realtek/r8169_firmware.c
-@@ -215,7 +215,7 @@ int rtl_fw_request_firmware(struct rtl_f
- {
- int rc;
-
-- rc = request_firmware(&rtl_fw->fw, rtl_fw->fw_name, rtl_fw->dev);
-+ rc = firmware_request_nowarn(&rtl_fw->fw, rtl_fw->fw_name, rtl_fw->dev);
- if (rc < 0)
- goto out;
-
-@@ -227,7 +227,7 @@ int rtl_fw_request_firmware(struct rtl_f
-
- return 0;
- out:
-- dev_err(rtl_fw->dev, "Unable to load firmware %s (%d)\n",
-- rtl_fw->fw_name, rc);
-+ dev_warn(rtl_fw->dev, "Unable to load firmware %s (%d)\n",
-+ rtl_fw->fw_name, rc);
- return rc;
- }
--- /dev/null
+From 473367a5ffe1607a61be481e2feda684eb5faea9 Mon Sep 17 00:00:00 2001
+Date: Fri, 7 Mar 2025 08:29:47 +0100
+Subject: [PATCH] r8169: increase max jumbo packet size on RTL8125/RTL8126
+
+Realtek confirmed that all RTL8125/RTL8126 chip versions support up to
+16K jumbo packets. Reflect this in the driver.
+
+Tested by Rui on RTL8125B with 12K jumbo packets.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -89,6 +89,7 @@
+ #define JUMBO_6K (6 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
+ #define JUMBO_7K (7 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
+ #define JUMBO_9K (9 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
++#define JUMBO_16K (SZ_16K - VLAN_ETH_HLEN - ETH_FCS_LEN)
+
+ static const struct {
+ const char *name;
+@@ -5359,6 +5360,9 @@ static int rtl_jumbo_max(struct rtl8169_
+ /* RTL8168c */
+ case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_24:
+ return JUMBO_6K;
++ /* RTL8125/8126 */
++ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
++ return JUMBO_16K;
+ default:
+ return JUMBO_9K;
+ }
+++ /dev/null
-From d64113c6bb5ea5a70b7c9c3a6bcadef307638187 Mon Sep 17 00:00:00 2001
-Date: Wed, 16 Oct 2024 22:31:10 +0200
-Subject: [PATCH] r8169: remove rtl_dash_loop_wait_high/low
-
-Remove rtl_dash_loop_wait_high/low to simplify the code.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 35 ++++++-----------------
- 1 file changed, 8 insertions(+), 27 deletions(-)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -1346,40 +1346,19 @@ static void rtl8168ep_stop_cmac(struct r
- RTL_W8(tp, IBCR0, RTL_R8(tp, IBCR0) & ~0x01);
- }
-
--static void rtl_dash_loop_wait(struct rtl8169_private *tp,
-- const struct rtl_cond *c,
-- unsigned long usecs, int n, bool high)
--{
-- if (!tp->dash_enabled)
-- return;
-- rtl_loop_wait(tp, c, usecs, n, high);
--}
--
--static void rtl_dash_loop_wait_high(struct rtl8169_private *tp,
-- const struct rtl_cond *c,
-- unsigned long d, int n)
--{
-- rtl_dash_loop_wait(tp, c, d, n, true);
--}
--
--static void rtl_dash_loop_wait_low(struct rtl8169_private *tp,
-- const struct rtl_cond *c,
-- unsigned long d, int n)
--{
-- rtl_dash_loop_wait(tp, c, d, n, false);
--}
--
- static void rtl8168dp_driver_start(struct rtl8169_private *tp)
- {
- r8168dp_oob_notify(tp, OOB_CMD_DRIVER_START);
-- rtl_dash_loop_wait_high(tp, &rtl_dp_ocp_read_cond, 10000, 10);
-+ if (tp->dash_enabled)
-+ rtl_loop_wait_high(tp, &rtl_dp_ocp_read_cond, 10000, 10);
- }
-
- static void rtl8168ep_driver_start(struct rtl8169_private *tp)
- {
- r8168ep_ocp_write(tp, 0x01, 0x180, OOB_CMD_DRIVER_START);
- r8168ep_ocp_write(tp, 0x01, 0x30, r8168ep_ocp_read(tp, 0x30) | 0x01);
-- rtl_dash_loop_wait_high(tp, &rtl_ep_ocp_read_cond, 10000, 30);
-+ if (tp->dash_enabled)
-+ rtl_loop_wait_high(tp, &rtl_ep_ocp_read_cond, 10000, 30);
- }
-
- static void rtl8168_driver_start(struct rtl8169_private *tp)
-@@ -1393,7 +1372,8 @@ static void rtl8168_driver_start(struct
- static void rtl8168dp_driver_stop(struct rtl8169_private *tp)
- {
- r8168dp_oob_notify(tp, OOB_CMD_DRIVER_STOP);
-- rtl_dash_loop_wait_low(tp, &rtl_dp_ocp_read_cond, 10000, 10);
-+ if (tp->dash_enabled)
-+ rtl_loop_wait_low(tp, &rtl_dp_ocp_read_cond, 10000, 10);
- }
-
- static void rtl8168ep_driver_stop(struct rtl8169_private *tp)
-@@ -1401,7 +1381,8 @@ static void rtl8168ep_driver_stop(struct
- rtl8168ep_stop_cmac(tp);
- r8168ep_ocp_write(tp, 0x01, 0x180, OOB_CMD_DRIVER_STOP);
- r8168ep_ocp_write(tp, 0x01, 0x30, r8168ep_ocp_read(tp, 0x30) | 0x01);
-- rtl_dash_loop_wait_low(tp, &rtl_ep_ocp_read_cond, 10000, 10);
-+ if (tp->dash_enabled)
-+ rtl_loop_wait_low(tp, &rtl_ep_ocp_read_cond, 10000, 10);
- }
-
- static void rtl8168_driver_stop(struct rtl8169_private *tp)
--- /dev/null
+From 34e5ededf4b8ad4c9e58f0cab8596e26c8fa59a2 Mon Sep 17 00:00:00 2001
+Date: Wed, 12 Mar 2025 20:21:42 +0100
+Subject: [PATCH] r8169: switch away from deprecated pcim_iomap_table
+
+Avoid using deprecated pcim_iomap_table by switching to
+pcim_iomap_region.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 9 ++++-----
+ 1 file changed, 4 insertions(+), 5 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -5446,11 +5446,10 @@ static int rtl_init_one(struct pci_dev *
+ if (region < 0)
+ return dev_err_probe(&pdev->dev, -ENODEV, "no MMIO resource found\n");
+
+- rc = pcim_iomap_regions(pdev, BIT(region), KBUILD_MODNAME);
+- if (rc < 0)
+- return dev_err_probe(&pdev->dev, rc, "cannot remap MMIO, aborting\n");
+-
+- tp->mmio_addr = pcim_iomap_table(pdev)[region];
++ tp->mmio_addr = pcim_iomap_region(pdev, region, KBUILD_MODNAME);
++ if (IS_ERR(tp->mmio_addr))
++ return dev_err_probe(&pdev->dev, PTR_ERR(tp->mmio_addr),
++ "cannot remap MMIO, aborting\n");
+
+ txconfig = RTL_R32(tp, TxConfig);
+ if (txconfig == ~0U)
+++ /dev/null
-From c4e64095c00cb2de413cd6b90be047c273bcd491 Mon Sep 17 00:00:00 2001
-Date: Thu, 17 Oct 2024 22:27:44 +0200
-Subject: [PATCH] r8169: enable EEE at 2.5G per default on RTL8125B
-
-Register a6d/12 is shadowing register MDIO_AN_EEE_ADV2. So this line
-disables advertisement of EEE at 2.5G. Latest vendor driver r8125
-doesn't do this (any longer?), so this mode seems to be safe.
-EEE saves quite some energy, therefore enable this mode per default.
-
----
- drivers/net/ethernet/realtek/r8169_phy_config.c | 1 -
- 1 file changed, 1 deletion(-)
-
---- a/drivers/net/ethernet/realtek/r8169_phy_config.c
-+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
-@@ -99,7 +99,6 @@ static void rtl8125a_config_eee_phy(stru
-
- static void rtl8125b_config_eee_phy(struct phy_device *phydev)
- {
-- phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
- phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
- phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
- phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
--- /dev/null
+From 3d9b8ac5341269d31e59fd5d58d47266ac78bc32 Mon Sep 17 00:00:00 2001
+Date: Tue, 18 Mar 2025 16:37:20 +0800
+Subject: [PATCH] r8169: enable RTL8168H/RTL8168EP/RTL8168FP ASPM support
+
+This patch will enable RTL8168H/RTL8168EP/RTL8168FP ASPM support on
+the platforms that have tested with ASPM enabled.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -5397,7 +5397,7 @@ done:
+ /* register is set if system vendor successfully tested ASPM 1.2 */
+ static bool rtl_aspm_is_safe(struct rtl8169_private *tp)
+ {
+- if (tp->mac_version >= RTL_GIGA_MAC_VER_61 &&
++ if (tp->mac_version >= RTL_GIGA_MAC_VER_46 &&
+ r8168_mac_ocp_read(tp, 0xc0b2) & 0xf)
+ return true;
+
+++ /dev/null
-From f75d1fbe7809bc5ed134204b920fd9e2fc5db1df Mon Sep 17 00:00:00 2001
-Date: Thu, 24 Oct 2024 22:42:33 +0200
-Subject: [PATCH] r8169: add support for RTL8125D
-
-This adds support for new chip version RTL8125D, which can be found on
-boards like Gigabyte X870E AORUS ELITE WIFI7. Firmware rtl8125d-1.fw
-for this chip version is available in linux-firmware already.
-
----
- drivers/net/ethernet/realtek/r8169.h | 1 +
- drivers/net/ethernet/realtek/r8169_main.c | 23 +++++++++++++------
- .../net/ethernet/realtek/r8169_phy_config.c | 10 ++++++++
- 3 files changed, 27 insertions(+), 7 deletions(-)
-
---- a/drivers/net/ethernet/realtek/r8169.h
-+++ b/drivers/net/ethernet/realtek/r8169.h
-@@ -68,6 +68,7 @@ enum mac_version {
- /* support for RTL_GIGA_MAC_VER_60 has been removed */
- RTL_GIGA_MAC_VER_61,
- RTL_GIGA_MAC_VER_63,
-+ RTL_GIGA_MAC_VER_64,
- RTL_GIGA_MAC_VER_65,
- RTL_GIGA_MAC_VER_66,
- RTL_GIGA_MAC_NONE
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -55,6 +55,7 @@
- #define FIRMWARE_8107E_2 "rtl_nic/rtl8107e-2.fw"
- #define FIRMWARE_8125A_3 "rtl_nic/rtl8125a-3.fw"
- #define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
-+#define FIRMWARE_8125D_1 "rtl_nic/rtl8125d-1.fw"
- #define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw"
- #define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw"
-
-@@ -138,6 +139,7 @@ static const struct {
- [RTL_GIGA_MAC_VER_61] = {"RTL8125A", FIRMWARE_8125A_3},
- /* reserve 62 for CFG_METHOD_4 in the vendor driver */
- [RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
-+ [RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
- [RTL_GIGA_MAC_VER_65] = {"RTL8126A", FIRMWARE_8126A_2},
- [RTL_GIGA_MAC_VER_66] = {"RTL8126A", FIRMWARE_8126A_3},
- };
-@@ -707,6 +709,7 @@ MODULE_FIRMWARE(FIRMWARE_8168FP_3);
- MODULE_FIRMWARE(FIRMWARE_8107E_2);
- MODULE_FIRMWARE(FIRMWARE_8125A_3);
- MODULE_FIRMWARE(FIRMWARE_8125B_2);
-+MODULE_FIRMWARE(FIRMWARE_8125D_1);
- MODULE_FIRMWARE(FIRMWARE_8126A_2);
- MODULE_FIRMWARE(FIRMWARE_8126A_3);
-
-@@ -2079,10 +2082,7 @@ static void rtl_set_eee_txidle_timer(str
- tp->tx_lpi_timer = timer_val;
- r8168_mac_ocp_write(tp, 0xe048, timer_val);
- break;
-- case RTL_GIGA_MAC_VER_61:
-- case RTL_GIGA_MAC_VER_63:
-- case RTL_GIGA_MAC_VER_65:
-- case RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
- tp->tx_lpi_timer = timer_val;
- RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
- break;
-@@ -2293,6 +2293,9 @@ static enum mac_version rtl8169_get_mac_
- { 0x7cf, 0x64a, RTL_GIGA_MAC_VER_66 },
- { 0x7cf, 0x649, RTL_GIGA_MAC_VER_65 },
-
-+ /* 8125D family. */
-+ { 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
-+
- /* 8125B family. */
- { 0x7cf, 0x641, RTL_GIGA_MAC_VER_63 },
-
-@@ -2560,9 +2563,7 @@ static void rtl_init_rxcfg(struct rtl816
- case RTL_GIGA_MAC_VER_61:
- RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
- break;
-- case RTL_GIGA_MAC_VER_63:
-- case RTL_GIGA_MAC_VER_65:
-- case RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
- RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
- RX_PAUSE_SLOT_ON);
- break;
-@@ -3874,6 +3875,12 @@ static void rtl_hw_start_8125b(struct rt
- rtl_hw_start_8125_common(tp);
- }
-
-+static void rtl_hw_start_8125d(struct rtl8169_private *tp)
-+{
-+ rtl_set_def_aspm_entry_latency(tp);
-+ rtl_hw_start_8125_common(tp);
-+}
-+
- static void rtl_hw_start_8126a(struct rtl8169_private *tp)
- {
- rtl_set_def_aspm_entry_latency(tp);
-@@ -3922,6 +3929,7 @@ static void rtl_hw_config(struct rtl8169
- [RTL_GIGA_MAC_VER_53] = rtl_hw_start_8117,
- [RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
- [RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
-+ [RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
- [RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,
- [RTL_GIGA_MAC_VER_66] = rtl_hw_start_8126a,
- };
-@@ -3939,6 +3947,7 @@ static void rtl_hw_start_8125(struct rtl
- /* disable interrupt coalescing */
- switch (tp->mac_version) {
- case RTL_GIGA_MAC_VER_61:
-+ case RTL_GIGA_MAC_VER_64:
- for (i = 0xa00; i < 0xb00; i += 4)
- RTL_W32(tp, i, 0);
- break;
---- a/drivers/net/ethernet/realtek/r8169_phy_config.c
-+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
-@@ -1103,6 +1103,15 @@ static void rtl8125b_hw_phy_config(struc
- rtl8125b_config_eee_phy(phydev);
- }
-
-+static void rtl8125d_hw_phy_config(struct rtl8169_private *tp,
-+ struct phy_device *phydev)
-+{
-+ r8169_apply_firmware(tp);
-+ rtl8125_legacy_force_mode(phydev);
-+ rtl8168g_disable_aldps(phydev);
-+ rtl8125b_config_eee_phy(phydev);
-+}
-+
- static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,
- struct phy_device *phydev)
- {
-@@ -1159,6 +1168,7 @@ void r8169_hw_phy_config(struct rtl8169_
- [RTL_GIGA_MAC_VER_53] = rtl8117_hw_phy_config,
- [RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
- [RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
-+ [RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
- [RTL_GIGA_MAC_VER_65] = rtl8126a_hw_phy_config,
- [RTL_GIGA_MAC_VER_66] = rtl8126a_hw_phy_config,
- };
--- /dev/null
+From b48688ea3c9ac8d5d910c6e91fb7f80d846581f0 Mon Sep 17 00:00:00 2001
+Date: Tue, 18 Mar 2025 16:37:21 +0800
+Subject: [PATCH] r8169: disable RTL8126 ZRX-DC timeout
+
+Disable it due to it dose not meet ZRX-DC specification. If it is enabled,
+device will exit L1 substate every 100ms. Disable it for saving more power
+in L1 substate.
+
+---
+ drivers/net/ethernet/realtek/r8169_main.c | 27 +++++++++++++++++++++++
+ 1 file changed, 27 insertions(+)
+
+--- a/drivers/net/ethernet/realtek/r8169_main.c
++++ b/drivers/net/ethernet/realtek/r8169_main.c
+@@ -2852,6 +2852,32 @@ static u32 rtl_csi_read(struct rtl8169_p
+ RTL_R32(tp, CSIDR) : ~0;
+ }
+
++static void rtl_disable_zrxdc_timeout(struct rtl8169_private *tp)
++{
++ struct pci_dev *pdev = tp->pci_dev;
++ u32 csi;
++ int rc;
++ u8 val;
++
++#define RTL_GEN3_RELATED_OFF 0x0890
++#define RTL_GEN3_ZRXDC_NONCOMPL 0x1
++ if (pdev->cfg_size > RTL_GEN3_RELATED_OFF) {
++ rc = pci_read_config_byte(pdev, RTL_GEN3_RELATED_OFF, &val);
++ if (rc == PCIBIOS_SUCCESSFUL) {
++ val &= ~RTL_GEN3_ZRXDC_NONCOMPL;
++ rc = pci_write_config_byte(pdev, RTL_GEN3_RELATED_OFF,
++ val);
++ if (rc == PCIBIOS_SUCCESSFUL)
++ return;
++ }
++ }
++
++ netdev_notice_once(tp->dev,
++ "No native access to PCI extended config space, falling back to CSI\n");
++ csi = rtl_csi_read(tp, RTL_GEN3_RELATED_OFF);
++ rtl_csi_write(tp, RTL_GEN3_RELATED_OFF, csi & ~RTL_GEN3_ZRXDC_NONCOMPL);
++}
++
+ static void rtl_set_aspm_entry_latency(struct rtl8169_private *tp, u8 val)
+ {
+ struct pci_dev *pdev = tp->pci_dev;
+@@ -3824,6 +3850,7 @@ static void rtl_hw_start_8125d(struct rt
+
+ static void rtl_hw_start_8126a(struct rtl8169_private *tp)
+ {
++ rtl_disable_zrxdc_timeout(tp);
+ rtl_set_def_aspm_entry_latency(tp);
+ rtl_hw_start_8125_common(tp);
+ }
+++ /dev/null
-From b8bd8c44a266c9a7dcb907eab10fbb119e3f6494 Mon Sep 17 00:00:00 2001
-Date: Thu, 24 Oct 2024 22:48:59 +0200
-Subject: [PATCH] r8169: fix inconsistent indenting in
- rtl8169_get_eth_mac_stats
-
-This fixes an inconsistent indenting introduced with e3fc5139bd8f
-("r8169: implement additional ethtool stats ops").
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -2225,7 +2225,7 @@ static void rtl8169_get_eth_mac_stats(st
- le64_to_cpu(tp->counters->tx_broadcast64);
- mac_stats->MulticastFramesReceivedOK =
- le64_to_cpu(tp->counters->rx_multicast64);
-- mac_stats->FrameTooLongErrors =
-+ mac_stats->FrameTooLongErrors =
- le32_to_cpu(tp->counters->rx_frame_too_long);
- }
-
+++ /dev/null
-From eb90f876b7961d702d7fc549e14614860f531e60 Mon Sep 17 00:00:00 2001
-Date: Thu, 31 Oct 2024 22:42:52 +0100
-Subject: [PATCH] r8169: align RTL8125 EEE config with vendor driver
-
-Align the EEE config for RTL8125A/RTL8125B with vendor driver r8125.
-This should help to avoid compatibility issues.
-
----
- .../net/ethernet/realtek/r8169_phy_config.c | 18 ++++++++++++------
- 1 file changed, 12 insertions(+), 6 deletions(-)
-
---- a/drivers/net/ethernet/realtek/r8169_phy_config.c
-+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
-@@ -89,19 +89,25 @@ static void rtl8168h_config_eee_phy(stru
- phy_modify_paged(phydev, 0xa42, 0x14, 0x0000, 0x0080);
- }
-
--static void rtl8125a_config_eee_phy(struct phy_device *phydev)
-+static void rtl8125_common_config_eee_phy(struct phy_device *phydev)
- {
-- rtl8168h_config_eee_phy(phydev);
-+ phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
-+ phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
-+ phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
-+}
-
-+static void rtl8125a_config_eee_phy(struct phy_device *phydev)
-+{
-+ rtl8168g_config_eee_phy(phydev);
-+ /* disable EEE at 2.5Gbps */
- phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
-- phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
-+ rtl8125_common_config_eee_phy(phydev);
- }
-
- static void rtl8125b_config_eee_phy(struct phy_device *phydev)
- {
-- phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000);
-- phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000);
-- phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
-+ rtl8168g_config_eee_phy(phydev);
-+ rtl8125_common_config_eee_phy(phydev);
- }
-
- static void rtl8169s_hw_phy_config(struct rtl8169_private *tp,
+++ /dev/null
-From 4af2f60bf7378bd5c92b15a528d8c6c7d02bed6c Mon Sep 17 00:00:00 2001
-Date: Thu, 31 Oct 2024 22:43:45 +0100
-Subject: [PATCH] r8169: align RTL8125/RTL8126 PHY config with vendor driver
-
-This aligns some parameters with vendor driver r8125/r8126 to avoid
-compatibility issues. Note that for RTL8125B there's no functional
-change, just the open-coded version of the function is replaced.
-
----
- drivers/net/ethernet/realtek/r8169_phy_config.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
---- a/drivers/net/ethernet/realtek/r8169_phy_config.c
-+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
-@@ -1073,8 +1073,8 @@ static void rtl8125b_hw_phy_config(struc
- struct phy_device *phydev)
- {
- r8169_apply_firmware(tp);
-+ rtl8168g_enable_gphy_10m(phydev);
-
-- phy_modify_paged(phydev, 0xa44, 0x11, 0x0000, 0x0800);
- phy_modify_paged(phydev, 0xac4, 0x13, 0x00f0, 0x0090);
- phy_modify_paged(phydev, 0xad3, 0x10, 0x0003, 0x0001);
-
-@@ -1113,6 +1113,7 @@ static void rtl8125d_hw_phy_config(struc
- struct phy_device *phydev)
- {
- r8169_apply_firmware(tp);
-+ rtl8168g_enable_gphy_10m(phydev);
- rtl8125_legacy_force_mode(phydev);
- rtl8168g_disable_aldps(phydev);
- rtl8125b_config_eee_phy(phydev);
-@@ -1122,6 +1123,9 @@ static void rtl8126a_hw_phy_config(struc
- struct phy_device *phydev)
- {
- r8169_apply_firmware(tp);
-+ rtl8168g_enable_gphy_10m(phydev);
-+ rtl8125_legacy_force_mode(phydev);
-+ rtl8168g_disable_aldps(phydev);
- }
-
- void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
+++ /dev/null
-From a3d8520e6a19ab018da6c7fc22512c913697a829 Mon Sep 17 00:00:00 2001
-Date: Thu, 31 Oct 2024 22:44:36 +0100
-Subject: [PATCH] r8169: align RTL8126 EEE config with vendor driver
-
-Align the EEE config for RTL8126A with vendor driver r8126 to avoid
-compatibility issues.
-
----
- drivers/net/ethernet/realtek/r8169_phy_config.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/net/ethernet/realtek/r8169_phy_config.c
-+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
-@@ -1126,6 +1126,7 @@ static void rtl8126a_hw_phy_config(struc
- rtl8168g_enable_gphy_10m(phydev);
- rtl8125_legacy_force_mode(phydev);
- rtl8168g_disable_aldps(phydev);
-+ rtl8125_common_config_eee_phy(phydev);
- }
-
- void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
+++ /dev/null
-From 2cd02f2fdd8a92e5b6b85ff64eab0fc549b30c07 Mon Sep 17 00:00:00 2001
-Date: Sat, 2 Nov 2024 14:49:01 +0100
-Subject: [PATCH] r8169: improve initialization of RSS registers on
- RTL8125/RTL8126
-
-Replace the register addresses with the names used in r8125/r8126
-vendor driver, and consider that RSS_CTRL_8125 is a 32 bit register.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -346,6 +346,8 @@ enum rtl8125_registers {
- TxPoll_8125 = 0x90,
- LEDSEL3 = 0x96,
- MAC0_BKP = 0x19e0,
-+ RSS_CTRL_8125 = 0x4500,
-+ Q_NUM_CTRL_8125 = 0x4800,
- EEE_TXIDLE_TIMER_8125 = 0x6048,
- };
-
-@@ -3768,8 +3770,8 @@ static void rtl_hw_start_8125_common(str
- rtl_pcie_state_l2l3_disable(tp);
-
- RTL_W16(tp, 0x382, 0x221b);
-- RTL_W8(tp, 0x4500, 0);
-- RTL_W16(tp, 0x4800, 0);
-+ RTL_W32(tp, RSS_CTRL_8125, 0);
-+ RTL_W16(tp, Q_NUM_CTRL_8125, 0);
-
- /* disable UPS */
- r8168_mac_ocp_modify(tp, 0xd40a, 0x0010, 0x0000);
+++ /dev/null
-From 83cb4b470c66b37b19a347a35cea01e0cbdd258d Mon Sep 17 00:00:00 2001
-Date: Mon, 4 Nov 2024 23:16:20 +0100
-Subject: [PATCH] r8169: remove leftover locks after reverted change
-
-After e31a9fedc7d8 ("Revert "r8169: disable ASPM during NAPI poll"")
-these locks aren't needed any longer.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 29 ++---------------------
- 1 file changed, 2 insertions(+), 27 deletions(-)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -662,13 +662,9 @@ struct rtl8169_private {
- struct work_struct work;
- } wk;
-
-- raw_spinlock_t config25_lock;
- raw_spinlock_t mac_ocp_lock;
- struct mutex led_lock; /* serialize LED ctrl RMW access */
-
-- raw_spinlock_t cfg9346_usage_lock;
-- int cfg9346_usage_count;
--
- unsigned supports_gmii:1;
- unsigned aspm_manageable:1;
- unsigned dash_enabled:1;
-@@ -722,22 +718,12 @@ static inline struct device *tp_to_dev(s
-
- static void rtl_lock_config_regs(struct rtl8169_private *tp)
- {
-- unsigned long flags;
--
-- raw_spin_lock_irqsave(&tp->cfg9346_usage_lock, flags);
-- if (!--tp->cfg9346_usage_count)
-- RTL_W8(tp, Cfg9346, Cfg9346_Lock);
-- raw_spin_unlock_irqrestore(&tp->cfg9346_usage_lock, flags);
-+ RTL_W8(tp, Cfg9346, Cfg9346_Lock);
- }
-
- static void rtl_unlock_config_regs(struct rtl8169_private *tp)
- {
-- unsigned long flags;
--
-- raw_spin_lock_irqsave(&tp->cfg9346_usage_lock, flags);
-- if (!tp->cfg9346_usage_count++)
-- RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
-- raw_spin_unlock_irqrestore(&tp->cfg9346_usage_lock, flags);
-+ RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
- }
-
- static void rtl_pci_commit(struct rtl8169_private *tp)
-@@ -748,24 +734,18 @@ static void rtl_pci_commit(struct rtl816
-
- static void rtl_mod_config2(struct rtl8169_private *tp, u8 clear, u8 set)
- {
-- unsigned long flags;
- u8 val;
-
-- raw_spin_lock_irqsave(&tp->config25_lock, flags);
- val = RTL_R8(tp, Config2);
- RTL_W8(tp, Config2, (val & ~clear) | set);
-- raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
- }
-
- static void rtl_mod_config5(struct rtl8169_private *tp, u8 clear, u8 set)
- {
-- unsigned long flags;
- u8 val;
-
-- raw_spin_lock_irqsave(&tp->config25_lock, flags);
- val = RTL_R8(tp, Config5);
- RTL_W8(tp, Config5, (val & ~clear) | set);
-- raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
- }
-
- static bool rtl_is_8125(struct rtl8169_private *tp)
-@@ -1571,7 +1551,6 @@ static void __rtl8169_set_wol(struct rtl
- { WAKE_MAGIC, Config3, MagicPacket }
- };
- unsigned int i, tmp = ARRAY_SIZE(cfg);
-- unsigned long flags;
- u8 options;
-
- rtl_unlock_config_regs(tp);
-@@ -1590,14 +1569,12 @@ static void __rtl8169_set_wol(struct rtl
- r8168_mac_ocp_modify(tp, 0xc0b6, BIT(0), 0);
- }
-
-- raw_spin_lock_irqsave(&tp->config25_lock, flags);
- for (i = 0; i < tmp; i++) {
- options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask;
- if (wolopts & cfg[i].opt)
- options |= cfg[i].mask;
- RTL_W8(tp, cfg[i].reg, options);
- }
-- raw_spin_unlock_irqrestore(&tp->config25_lock, flags);
-
- switch (tp->mac_version) {
- case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
-@@ -5458,8 +5435,6 @@ static int rtl_init_one(struct pci_dev *
- tp->supports_gmii = ent->driver_data == RTL_CFG_NO_GBIT ? 0 : 1;
- tp->ocp_base = OCP_STD_PHY_BASE;
-
-- raw_spin_lock_init(&tp->cfg9346_usage_lock);
-- raw_spin_lock_init(&tp->config25_lock);
- raw_spin_lock_init(&tp->mac_ocp_lock);
- mutex_init(&tp->led_lock);
-
+++ /dev/null
-From c507e96b5763b36b63ad50ad804341f72ea000e4 Mon Sep 17 00:00:00 2001
-Date: Wed, 6 Nov 2024 17:55:45 +0100
-Subject: [PATCH] r8169: improve __rtl8169_set_wol
-
-Add helper r8169_mod_reg8_cond() what allows to significantly simplify
-__rtl8169_set_wol().
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 55 ++++++++++-------------
- 1 file changed, 24 insertions(+), 31 deletions(-)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -748,6 +748,20 @@ static void rtl_mod_config5(struct rtl81
- RTL_W8(tp, Config5, (val & ~clear) | set);
- }
-
-+static void r8169_mod_reg8_cond(struct rtl8169_private *tp, int reg,
-+ u8 bits, bool cond)
-+{
-+ u8 val, old_val;
-+
-+ old_val = RTL_R8(tp, reg);
-+ if (cond)
-+ val = old_val | bits;
-+ else
-+ val = old_val & ~bits;
-+ if (val != old_val)
-+ RTL_W8(tp, reg, val);
-+}
-+
- static bool rtl_is_8125(struct rtl8169_private *tp)
- {
- return tp->mac_version >= RTL_GIGA_MAC_VER_61;
-@@ -1538,58 +1552,37 @@ static void rtl8169_get_wol(struct net_d
-
- static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)
- {
-- static const struct {
-- u32 opt;
-- u16 reg;
-- u8 mask;
-- } cfg[] = {
-- { WAKE_PHY, Config3, LinkUp },
-- { WAKE_UCAST, Config5, UWF },
-- { WAKE_BCAST, Config5, BWF },
-- { WAKE_MCAST, Config5, MWF },
-- { WAKE_ANY, Config5, LanWake },
-- { WAKE_MAGIC, Config3, MagicPacket }
-- };
-- unsigned int i, tmp = ARRAY_SIZE(cfg);
-- u8 options;
--
- rtl_unlock_config_regs(tp);
-
- if (rtl_is_8168evl_up(tp)) {
-- tmp--;
- if (wolopts & WAKE_MAGIC)
- rtl_eri_set_bits(tp, 0x0dc, MagicPacket_v2);
- else
- rtl_eri_clear_bits(tp, 0x0dc, MagicPacket_v2);
- } else if (rtl_is_8125(tp)) {
-- tmp--;
- if (wolopts & WAKE_MAGIC)
- r8168_mac_ocp_modify(tp, 0xc0b6, 0, BIT(0));
- else
- r8168_mac_ocp_modify(tp, 0xc0b6, BIT(0), 0);
-+ } else {
-+ r8169_mod_reg8_cond(tp, Config3, MagicPacket,
-+ wolopts & WAKE_MAGIC);
- }
-
-- for (i = 0; i < tmp; i++) {
-- options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask;
-- if (wolopts & cfg[i].opt)
-- options |= cfg[i].mask;
-- RTL_W8(tp, cfg[i].reg, options);
-- }
-+ r8169_mod_reg8_cond(tp, Config3, LinkUp, wolopts & WAKE_PHY);
-+ r8169_mod_reg8_cond(tp, Config5, UWF, wolopts & WAKE_UCAST);
-+ r8169_mod_reg8_cond(tp, Config5, BWF, wolopts & WAKE_BCAST);
-+ r8169_mod_reg8_cond(tp, Config5, MWF, wolopts & WAKE_MCAST);
-+ r8169_mod_reg8_cond(tp, Config5, LanWake, wolopts);
-
- switch (tp->mac_version) {
- case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
-- options = RTL_R8(tp, Config1) & ~PMEnable;
-- if (wolopts)
-- options |= PMEnable;
-- RTL_W8(tp, Config1, options);
-+ r8169_mod_reg8_cond(tp, Config1, PMEnable, wolopts);
- break;
- case RTL_GIGA_MAC_VER_34:
- case RTL_GIGA_MAC_VER_37:
- case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
-- if (wolopts)
-- rtl_mod_config2(tp, 0, PME_SIGNAL);
-- else
-- rtl_mod_config2(tp, PME_SIGNAL, 0);
-+ r8169_mod_reg8_cond(tp, Config2, PME_SIGNAL, wolopts);
- break;
- default:
- break;
+++ /dev/null
-From 330dc2297c82953dff402e0b4176a5383a618538 Mon Sep 17 00:00:00 2001
-Date: Wed, 6 Nov 2024 17:56:28 +0100
-Subject: [PATCH] r8169: improve rtl_set_d3_pll_down
-
-Make use of new helper r8169_mod_reg8_cond() and move from a switch()
-to an if() clause. Benefit is that we don't have to touch this piece of
-code each time support for a new chip version is added.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 18 +++++-------------
- 1 file changed, 5 insertions(+), 13 deletions(-)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -1431,19 +1431,11 @@ static enum rtl_dash_type rtl_get_dash_t
-
- static void rtl_set_d3_pll_down(struct rtl8169_private *tp, bool enable)
- {
-- switch (tp->mac_version) {
-- case RTL_GIGA_MAC_VER_25 ... RTL_GIGA_MAC_VER_26:
-- case RTL_GIGA_MAC_VER_29 ... RTL_GIGA_MAC_VER_30:
-- case RTL_GIGA_MAC_VER_32 ... RTL_GIGA_MAC_VER_37:
-- case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
-- if (enable)
-- RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~D3_NO_PLL_DOWN);
-- else
-- RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | D3_NO_PLL_DOWN);
-- break;
-- default:
-- break;
-- }
-+ if (tp->mac_version >= RTL_GIGA_MAC_VER_25 &&
-+ tp->mac_version != RTL_GIGA_MAC_VER_28 &&
-+ tp->mac_version != RTL_GIGA_MAC_VER_31 &&
-+ tp->mac_version != RTL_GIGA_MAC_VER_38)
-+ r8169_mod_reg8_cond(tp, PMCH, D3_NO_PLL_DOWN, !enable);
- }
-
- static void rtl_reset_packet_filter(struct rtl8169_private *tp)
+++ /dev/null
-From e3e9e9039fa6ae885c7d5c954d7b9f105fa23e8f Mon Sep 17 00:00:00 2001
-Date: Wed, 6 Nov 2024 17:57:08 +0100
-Subject: [PATCH] r8169: align WAKE_PHY handling with r8125/r8126 vendor
- drivers
-
-Vendor drivers r8125/r8126 apply this additional magic setting when
-enabling WAKE_PHY, so do the same here.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 3 +++
- 1 file changed, 3 insertions(+)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -1562,6 +1562,9 @@ static void __rtl8169_set_wol(struct rtl
- }
-
- r8169_mod_reg8_cond(tp, Config3, LinkUp, wolopts & WAKE_PHY);
-+ if (rtl_is_8125(tp))
-+ r8168_mac_ocp_modify(tp, 0xe0c6, 0x3f,
-+ wolopts & WAKE_PHY ? 0x13 : 0);
- r8169_mod_reg8_cond(tp, Config5, UWF, wolopts & WAKE_UCAST);
- r8169_mod_reg8_cond(tp, Config5, BWF, wolopts & WAKE_BCAST);
- r8169_mod_reg8_cond(tp, Config5, MWF, wolopts & WAKE_MCAST);
+++ /dev/null
-From 7a3bcd39ae1f0e3ab896d9df62339ab4297a0bfd Mon Sep 17 00:00:00 2001
-Date: Sat, 9 Nov 2024 23:12:12 +0100
-Subject: [PATCH] r8169: use helper r8169_mod_reg8_cond to simplify
- rtl_jumbo_config
-
-Use recently added helper r8169_mod_reg8_cond() to simplify jumbo
-mode configuration.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 77 ++++-------------------
- 1 file changed, 11 insertions(+), 66 deletions(-)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -2545,86 +2545,31 @@ static void rtl8169_init_ring_indexes(st
- tp->dirty_tx = tp->cur_tx = tp->cur_rx = 0;
- }
-
--static void r8168c_hw_jumbo_enable(struct rtl8169_private *tp)
--{
-- RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
-- RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
--}
--
--static void r8168c_hw_jumbo_disable(struct rtl8169_private *tp)
--{
-- RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
-- RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
--}
--
--static void r8168dp_hw_jumbo_enable(struct rtl8169_private *tp)
--{
-- RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
--}
--
--static void r8168dp_hw_jumbo_disable(struct rtl8169_private *tp)
--{
-- RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
--}
--
--static void r8168e_hw_jumbo_enable(struct rtl8169_private *tp)
--{
-- RTL_W8(tp, MaxTxPacketSize, 0x24);
-- RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
-- RTL_W8(tp, Config4, RTL_R8(tp, Config4) | 0x01);
--}
--
--static void r8168e_hw_jumbo_disable(struct rtl8169_private *tp)
--{
-- RTL_W8(tp, MaxTxPacketSize, 0x3f);
-- RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
-- RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~0x01);
--}
--
--static void r8168b_1_hw_jumbo_enable(struct rtl8169_private *tp)
--{
-- RTL_W8(tp, Config4, RTL_R8(tp, Config4) | (1 << 0));
--}
--
--static void r8168b_1_hw_jumbo_disable(struct rtl8169_private *tp)
--{
-- RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~(1 << 0));
--}
--
- static void rtl_jumbo_config(struct rtl8169_private *tp)
- {
- bool jumbo = tp->dev->mtu > ETH_DATA_LEN;
- int readrq = 4096;
-
-+ if (jumbo && tp->mac_version >= RTL_GIGA_MAC_VER_17 &&
-+ tp->mac_version <= RTL_GIGA_MAC_VER_26)
-+ readrq = 512;
-+
- rtl_unlock_config_regs(tp);
- switch (tp->mac_version) {
- case RTL_GIGA_MAC_VER_17:
-- if (jumbo) {
-- readrq = 512;
-- r8168b_1_hw_jumbo_enable(tp);
-- } else {
-- r8168b_1_hw_jumbo_disable(tp);
-- }
-+ r8169_mod_reg8_cond(tp, Config4, BIT(0), jumbo);
- break;
- case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_26:
-- if (jumbo) {
-- readrq = 512;
-- r8168c_hw_jumbo_enable(tp);
-- } else {
-- r8168c_hw_jumbo_disable(tp);
-- }
-+ r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);
-+ r8169_mod_reg8_cond(tp, Config4, Jumbo_En1, jumbo);
- break;
- case RTL_GIGA_MAC_VER_28:
-- if (jumbo)
-- r8168dp_hw_jumbo_enable(tp);
-- else
-- r8168dp_hw_jumbo_disable(tp);
-+ r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);
- break;
- case RTL_GIGA_MAC_VER_31 ... RTL_GIGA_MAC_VER_33:
-- if (jumbo)
-- r8168e_hw_jumbo_enable(tp);
-- else
-- r8168e_hw_jumbo_disable(tp);
-+ RTL_W8(tp, MaxTxPacketSize, jumbo ? 0x24 : 0x3f);
-+ r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);
-+ r8169_mod_reg8_cond(tp, Config4, BIT(0), jumbo);
- break;
- default:
- break;
+++ /dev/null
-From e340bff27e63ed61a1e9895bed546107859e48a7 Mon Sep 17 00:00:00 2001
-Date: Fri, 8 Nov 2024 08:08:24 +0100
-Subject: [PATCH] r8169: copy vendor driver 2.5G/5G EEE advertisement
- constraints
-
-Vendor driver r8125 doesn't advertise 2.5G EEE on RTL8125A, and r8126
-doesn't advertise 5G EEE. Likely there are compatibility issues,
-therefore do the same in r8169.
-With this change we don't have to disable 2.5G EEE advertisement in
-rtl8125a_config_eee_phy() any longer.
-We use new phylib accessor phy_set_eee_broken() to mark the respective
-EEE modes as broken.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 6 ++++++
- drivers/net/ethernet/realtek/r8169_phy_config.c | 16 ++++------------
- 2 files changed, 10 insertions(+), 12 deletions(-)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5234,6 +5234,11 @@ static int r8169_mdio_register(struct rt
- phy_support_eee(tp->phydev);
- phy_support_asym_pause(tp->phydev);
-
-+ /* mimic behavior of r8125/r8126 vendor drivers */
-+ if (tp->mac_version == RTL_GIGA_MAC_VER_61)
-+ tp->phydev->eee_broken_modes |= MDIO_EEE_2_5GT;
-+ tp->phydev->eee_broken_modes |= MDIO_EEE_5GT;
-+
- /* PHY will be woken up in rtl_open() */
- phy_suspend(tp->phydev);
-
---- a/drivers/net/ethernet/realtek/r8169_phy_config.c
-+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
-@@ -96,15 +96,7 @@ static void rtl8125_common_config_eee_ph
- phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);
- }
-
--static void rtl8125a_config_eee_phy(struct phy_device *phydev)
--{
-- rtl8168g_config_eee_phy(phydev);
-- /* disable EEE at 2.5Gbps */
-- phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);
-- rtl8125_common_config_eee_phy(phydev);
--}
--
--static void rtl8125b_config_eee_phy(struct phy_device *phydev)
-+static void rtl8125_config_eee_phy(struct phy_device *phydev)
- {
- rtl8168g_config_eee_phy(phydev);
- rtl8125_common_config_eee_phy(phydev);
-@@ -1066,7 +1058,7 @@ static void rtl8125a_2_hw_phy_config(str
- rtl8168g_enable_gphy_10m(phydev);
-
- rtl8168g_disable_aldps(phydev);
-- rtl8125a_config_eee_phy(phydev);
-+ rtl8125_config_eee_phy(phydev);
- }
-
- static void rtl8125b_hw_phy_config(struct rtl8169_private *tp,
-@@ -1106,7 +1098,7 @@ static void rtl8125b_hw_phy_config(struc
-
- rtl8125_legacy_force_mode(phydev);
- rtl8168g_disable_aldps(phydev);
-- rtl8125b_config_eee_phy(phydev);
-+ rtl8125_config_eee_phy(phydev);
- }
-
- static void rtl8125d_hw_phy_config(struct rtl8169_private *tp,
-@@ -1116,7 +1108,7 @@ static void rtl8125d_hw_phy_config(struc
- rtl8168g_enable_gphy_10m(phydev);
- rtl8125_legacy_force_mode(phydev);
- rtl8168g_disable_aldps(phydev);
-- rtl8125b_config_eee_phy(phydev);
-+ rtl8125_config_eee_phy(phydev);
- }
-
- static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,
+++ /dev/null
-From 2e20bf8cc05766dcd0357cdfcada49e1bc45512b Mon Sep 17 00:00:00 2001
-Date: Mon, 2 Dec 2024 21:14:35 +0100
-Subject: [PATCH] r8169: remove unused flag RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE
-
-After 854d71c555dfc3 ("r8169: remove original workaround for RTL8125
-broken rx issue") this flag isn't used any longer. So remove it.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 3 ---
- 1 file changed, 3 deletions(-)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -623,7 +623,6 @@ struct rtl8169_tc_offsets {
- enum rtl_flag {
- RTL_FLAG_TASK_ENABLED = 0,
- RTL_FLAG_TASK_RESET_PENDING,
-- RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE,
- RTL_FLAG_TASK_TX_TIMEOUT,
- RTL_FLAG_MAX
- };
-@@ -4728,8 +4727,6 @@ static void rtl_task(struct work_struct
- reset:
- rtl_reset_work(tp);
- netif_wake_queue(tp->dev);
-- } else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp->wk.flags)) {
-- rtl_reset_work(tp);
- }
- }
-
+++ /dev/null
-From bb18265c3aba92b91a1355609769f3e967b65dee Mon Sep 17 00:00:00 2001
-Date: Mon, 2 Dec 2024 21:20:02 +0100
-Subject: [PATCH] r8169: remove support for chip version 11
-
-This is a follow-up to 982300c115d2 ("r8169: remove detection of chip
-version 11 (early RTL8168b)"). Nobody complained yet, so remove
-support for this chip version.
-
----
- drivers/net/ethernet/realtek/r8169.h | 2 +-
- drivers/net/ethernet/realtek/r8169_main.c | 14 +-------------
- drivers/net/ethernet/realtek/r8169_phy_config.c | 10 ----------
- 3 files changed, 2 insertions(+), 24 deletions(-)
-
---- a/drivers/net/ethernet/realtek/r8169.h
-+++ b/drivers/net/ethernet/realtek/r8169.h
-@@ -23,7 +23,7 @@ enum mac_version {
- RTL_GIGA_MAC_VER_08,
- RTL_GIGA_MAC_VER_09,
- RTL_GIGA_MAC_VER_10,
-- RTL_GIGA_MAC_VER_11,
-+ /* support for RTL_GIGA_MAC_VER_11 has been removed */
- /* RTL_GIGA_MAC_VER_12 was handled the same as VER_17 */
- /* RTL_GIGA_MAC_VER_13 was merged with VER_10 */
- RTL_GIGA_MAC_VER_14,
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -103,7 +103,6 @@ static const struct {
- [RTL_GIGA_MAC_VER_08] = {"RTL8102e" },
- [RTL_GIGA_MAC_VER_09] = {"RTL8102e/RTL8103e" },
- [RTL_GIGA_MAC_VER_10] = {"RTL8101e/RTL8100e" },
-- [RTL_GIGA_MAC_VER_11] = {"RTL8168b/8111b" },
- [RTL_GIGA_MAC_VER_14] = {"RTL8401" },
- [RTL_GIGA_MAC_VER_17] = {"RTL8168b/8111b" },
- [RTL_GIGA_MAC_VER_18] = {"RTL8168cp/8111cp" },
-@@ -2335,7 +2334,7 @@ static enum mac_version rtl8169_get_mac_
-
- /* 8168B family. */
- { 0x7c8, 0x380, RTL_GIGA_MAC_VER_17 },
-- /* This one is very old and rare, let's see if anybody complains.
-+ /* This one is very old and rare, support has been removed.
- * { 0x7c8, 0x300, RTL_GIGA_MAC_VER_11 },
- */
-
-@@ -3805,7 +3804,6 @@ static void rtl_hw_config(struct rtl8169
- [RTL_GIGA_MAC_VER_08] = rtl_hw_start_8102e_3,
- [RTL_GIGA_MAC_VER_09] = rtl_hw_start_8102e_2,
- [RTL_GIGA_MAC_VER_10] = NULL,
-- [RTL_GIGA_MAC_VER_11] = rtl_hw_start_8168b,
- [RTL_GIGA_MAC_VER_14] = rtl_hw_start_8401,
- [RTL_GIGA_MAC_VER_17] = rtl_hw_start_8168b,
- [RTL_GIGA_MAC_VER_18] = rtl_hw_start_8168cp_1,
-@@ -4681,12 +4679,6 @@ static irqreturn_t rtl8169_interrupt(int
- if (status & LinkChg)
- phy_mac_interrupt(tp->phydev);
-
-- if (unlikely(status & RxFIFOOver &&
-- tp->mac_version == RTL_GIGA_MAC_VER_11)) {
-- netif_stop_queue(tp->dev);
-- rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
-- }
--
- rtl_irq_disable(tp);
- napi_schedule(&tp->napi);
- out:
-@@ -5106,9 +5098,6 @@ static void rtl_set_irq_mask(struct rtl8
-
- if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
- tp->irq_mask |= SYSErr | RxFIFOOver;
-- else if (tp->mac_version == RTL_GIGA_MAC_VER_11)
-- /* special workaround needed */
-- tp->irq_mask |= RxFIFOOver;
- }
-
- static int rtl_alloc_irq(struct rtl8169_private *tp)
-@@ -5302,7 +5291,6 @@ static int rtl_jumbo_max(struct rtl8169_
- case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
- return JUMBO_7K;
- /* RTL8168b */
-- case RTL_GIGA_MAC_VER_11:
- case RTL_GIGA_MAC_VER_17:
- return JUMBO_4K;
- /* RTL8168c */
---- a/drivers/net/ethernet/realtek/r8169_phy_config.c
-+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
-@@ -276,15 +276,6 @@ static void rtl8169sce_hw_phy_config(str
- rtl_writephy_batch(phydev, phy_reg_init);
- }
-
--static void rtl8168bb_hw_phy_config(struct rtl8169_private *tp,
-- struct phy_device *phydev)
--{
-- phy_write(phydev, 0x1f, 0x0001);
-- phy_set_bits(phydev, 0x16, BIT(0));
-- phy_write(phydev, 0x10, 0xf41b);
-- phy_write(phydev, 0x1f, 0x0000);
--}
--
- static void rtl8168bef_hw_phy_config(struct rtl8169_private *tp,
- struct phy_device *phydev)
- {
-@@ -1136,7 +1127,6 @@ void r8169_hw_phy_config(struct rtl8169_
- [RTL_GIGA_MAC_VER_08] = rtl8102e_hw_phy_config,
- [RTL_GIGA_MAC_VER_09] = rtl8102e_hw_phy_config,
- [RTL_GIGA_MAC_VER_10] = NULL,
-- [RTL_GIGA_MAC_VER_11] = rtl8168bb_hw_phy_config,
- [RTL_GIGA_MAC_VER_14] = rtl8401_hw_phy_config,
- [RTL_GIGA_MAC_VER_17] = rtl8168bef_hw_phy_config,
- [RTL_GIGA_MAC_VER_18] = rtl8168cp_1_hw_phy_config,
+++ /dev/null
-From b299ea0069284186b0d3d54aebe87f0d195d457a Mon Sep 17 00:00:00 2001
-Date: Fri, 13 Dec 2024 20:01:41 +0100
-Subject: [PATCH] r8169: adjust version numbering for RTL8126
-
-Adjust version numbering for RTL8126, so that it doesn't overlap with
-new RTL8125 versions.
-
----
- drivers/net/ethernet/realtek/r8169.h | 4 +-
- drivers/net/ethernet/realtek/r8169_main.c | 62 +++++++++----------
- .../net/ethernet/realtek/r8169_phy_config.c | 4 +-
- 3 files changed, 35 insertions(+), 35 deletions(-)
-
---- a/drivers/net/ethernet/realtek/r8169.h
-+++ b/drivers/net/ethernet/realtek/r8169.h
-@@ -69,8 +69,8 @@ enum mac_version {
- RTL_GIGA_MAC_VER_61,
- RTL_GIGA_MAC_VER_63,
- RTL_GIGA_MAC_VER_64,
-- RTL_GIGA_MAC_VER_65,
-- RTL_GIGA_MAC_VER_66,
-+ RTL_GIGA_MAC_VER_70,
-+ RTL_GIGA_MAC_VER_71,
- RTL_GIGA_MAC_NONE
- };
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -139,8 +139,8 @@ static const struct {
- /* reserve 62 for CFG_METHOD_4 in the vendor driver */
- [RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
- [RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
-- [RTL_GIGA_MAC_VER_65] = {"RTL8126A", FIRMWARE_8126A_2},
-- [RTL_GIGA_MAC_VER_66] = {"RTL8126A", FIRMWARE_8126A_3},
-+ [RTL_GIGA_MAC_VER_70] = {"RTL8126A", FIRMWARE_8126A_2},
-+ [RTL_GIGA_MAC_VER_71] = {"RTL8126A", FIRMWARE_8126A_3},
- };
-
- static const struct pci_device_id rtl8169_pci_tbl[] = {
-@@ -1228,7 +1228,7 @@ static void rtl_writephy(struct rtl8169_
- case RTL_GIGA_MAC_VER_31:
- r8168dp_2_mdio_write(tp, location, val);
- break;
-- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
- r8168g_mdio_write(tp, location, val);
- break;
- default:
-@@ -1243,7 +1243,7 @@ static int rtl_readphy(struct rtl8169_pr
- case RTL_GIGA_MAC_VER_28:
- case RTL_GIGA_MAC_VER_31:
- return r8168dp_2_mdio_read(tp, location);
-- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
- return r8168g_mdio_read(tp, location);
- default:
- return r8169_mdio_read(tp, location);
-@@ -1574,7 +1574,7 @@ static void __rtl8169_set_wol(struct rtl
- break;
- case RTL_GIGA_MAC_VER_34:
- case RTL_GIGA_MAC_VER_37:
-- case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_71:
- r8169_mod_reg8_cond(tp, Config2, PME_SIGNAL, wolopts);
- break;
- default:
-@@ -2047,7 +2047,7 @@ static void rtl_set_eee_txidle_timer(str
- tp->tx_lpi_timer = timer_val;
- r8168_mac_ocp_write(tp, 0xe048, timer_val);
- break;
-- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
- tp->tx_lpi_timer = timer_val;
- RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
- break;
-@@ -2255,8 +2255,8 @@ static enum mac_version rtl8169_get_mac_
- enum mac_version ver;
- } mac_info[] = {
- /* 8126A family. */
-- { 0x7cf, 0x64a, RTL_GIGA_MAC_VER_66 },
-- { 0x7cf, 0x649, RTL_GIGA_MAC_VER_65 },
-+ { 0x7cf, 0x64a, RTL_GIGA_MAC_VER_71 },
-+ { 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
-
- /* 8125D family. */
- { 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
-@@ -2528,7 +2528,7 @@ static void rtl_init_rxcfg(struct rtl816
- case RTL_GIGA_MAC_VER_61:
- RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
- break;
-- case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_71:
- RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
- RX_PAUSE_SLOT_ON);
- break;
-@@ -2660,7 +2660,7 @@ static void rtl_wait_txrx_fifo_empty(str
- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_61:
- rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
- break;
-- case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_71:
- RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
- rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
- rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond_2, 100, 42);
-@@ -2903,7 +2903,7 @@ static void rtl_enable_exit_l1(struct rt
- case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_38:
- rtl_eri_set_bits(tp, 0xd4, 0x0c00);
- break;
-- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
- r8168_mac_ocp_modify(tp, 0xc0ac, 0, 0x1f80);
- break;
- default:
-@@ -2917,7 +2917,7 @@ static void rtl_disable_exit_l1(struct r
- case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38:
- rtl_eri_clear_bits(tp, 0xd4, 0x1f00);
- break;
-- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
- r8168_mac_ocp_modify(tp, 0xc0ac, 0x1f80, 0);
- break;
- default:
-@@ -2943,8 +2943,8 @@ static void rtl_hw_aspm_clkreq_enable(st
-
- rtl_mod_config5(tp, 0, ASPM_en);
- switch (tp->mac_version) {
-- case RTL_GIGA_MAC_VER_65:
-- case RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_70:
-+ case RTL_GIGA_MAC_VER_71:
- val8 = RTL_R8(tp, INT_CFG0_8125) | INT_CFG0_CLKREQEN;
- RTL_W8(tp, INT_CFG0_8125, val8);
- break;
-@@ -2955,7 +2955,7 @@ static void rtl_hw_aspm_clkreq_enable(st
-
- switch (tp->mac_version) {
- case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
-- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
- /* reset ephy tx/rx disable timer */
- r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0);
- /* chip can trigger L1.2 */
-@@ -2967,7 +2967,7 @@ static void rtl_hw_aspm_clkreq_enable(st
- } else {
- switch (tp->mac_version) {
- case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
-- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
- r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0);
- break;
- default:
-@@ -2975,8 +2975,8 @@ static void rtl_hw_aspm_clkreq_enable(st
- }
-
- switch (tp->mac_version) {
-- case RTL_GIGA_MAC_VER_65:
-- case RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_70:
-+ case RTL_GIGA_MAC_VER_71:
- val8 = RTL_R8(tp, INT_CFG0_8125) & ~INT_CFG0_CLKREQEN;
- RTL_W8(tp, INT_CFG0_8125, val8);
- break;
-@@ -3696,12 +3696,12 @@ static void rtl_hw_start_8125_common(str
- /* disable new tx descriptor format */
- r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000);
-
-- if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
-- tp->mac_version == RTL_GIGA_MAC_VER_66)
-+ if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
-+ tp->mac_version == RTL_GIGA_MAC_VER_71)
- RTL_W8(tp, 0xD8, RTL_R8(tp, 0xD8) & ~0x02);
-
-- if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
-- tp->mac_version == RTL_GIGA_MAC_VER_66)
-+ if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
-+ tp->mac_version == RTL_GIGA_MAC_VER_71)
- r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400);
- else if (tp->mac_version == RTL_GIGA_MAC_VER_63)
- r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200);
-@@ -3719,8 +3719,8 @@ static void rtl_hw_start_8125_common(str
- r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0030);
- r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000);
- r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001);
-- if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
-- tp->mac_version == RTL_GIGA_MAC_VER_66)
-+ if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
-+ tp->mac_version == RTL_GIGA_MAC_VER_71)
- r8168_mac_ocp_modify(tp, 0xea1c, 0x0300, 0x0000);
- else
- r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000);
-@@ -3839,8 +3839,8 @@ static void rtl_hw_config(struct rtl8169
- [RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
- [RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
- [RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
-- [RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,
-- [RTL_GIGA_MAC_VER_66] = rtl_hw_start_8126a,
-+ [RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
-+ [RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
- };
-
- if (hw_configs[tp->mac_version])
-@@ -3861,8 +3861,8 @@ static void rtl_hw_start_8125(struct rtl
- RTL_W32(tp, i, 0);
- break;
- case RTL_GIGA_MAC_VER_63:
-- case RTL_GIGA_MAC_VER_65:
-- case RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_70:
-+ case RTL_GIGA_MAC_VER_71:
- for (i = 0xa00; i < 0xa80; i += 4)
- RTL_W32(tp, i, 0);
- RTL_W16(tp, INT_CFG1_8125, 0x0000);
-@@ -4094,7 +4094,7 @@ static void rtl8169_cleanup(struct rtl81
- RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
- rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
- break;
-- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
- rtl_enable_rxdvgate(tp);
- fsleep(2000);
- break;
-@@ -4251,7 +4251,7 @@ static unsigned int rtl_quirk_packet_pad
-
- switch (tp->mac_version) {
- case RTL_GIGA_MAC_VER_34:
-- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
- padto = max_t(unsigned int, padto, ETH_ZLEN);
- break;
- default:
-@@ -5272,7 +5272,7 @@ static void rtl_hw_initialize(struct rtl
- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:
- rtl_hw_init_8168g(tp);
- break;
-- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
-+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
- rtl_hw_init_8125(tp);
- break;
- default:
---- a/drivers/net/ethernet/realtek/r8169_phy_config.c
-+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
-@@ -1162,8 +1162,8 @@ void r8169_hw_phy_config(struct rtl8169_
- [RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
- [RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
- [RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
-- [RTL_GIGA_MAC_VER_65] = rtl8126a_hw_phy_config,
-- [RTL_GIGA_MAC_VER_66] = rtl8126a_hw_phy_config,
-+ [RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
-+ [RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
- };
-
- if (phy_configs[ver])
+++ /dev/null
-From b3593df26ab19f114d613693fa8a92ab202803d0 Mon Sep 17 00:00:00 2001
-Date: Fri, 13 Dec 2024 20:02:58 +0100
-Subject: [PATCH] r8169: add support for RTL8125D rev.b
-
-Add support for RTL8125D rev.b. Its XID is 0x689. It is basically
-based on the one with XID 0x688, but with different firmware file.
-
----
- drivers/net/ethernet/realtek/r8169.h | 1 +
- drivers/net/ethernet/realtek/r8169_main.c | 6 ++++++
- drivers/net/ethernet/realtek/r8169_phy_config.c | 1 +
- 3 files changed, 8 insertions(+)
-
---- a/drivers/net/ethernet/realtek/r8169.h
-+++ b/drivers/net/ethernet/realtek/r8169.h
-@@ -69,6 +69,7 @@ enum mac_version {
- RTL_GIGA_MAC_VER_61,
- RTL_GIGA_MAC_VER_63,
- RTL_GIGA_MAC_VER_64,
-+ RTL_GIGA_MAC_VER_65,
- RTL_GIGA_MAC_VER_70,
- RTL_GIGA_MAC_VER_71,
- RTL_GIGA_MAC_NONE
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -56,6 +56,7 @@
- #define FIRMWARE_8125A_3 "rtl_nic/rtl8125a-3.fw"
- #define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
- #define FIRMWARE_8125D_1 "rtl_nic/rtl8125d-1.fw"
-+#define FIRMWARE_8125D_2 "rtl_nic/rtl8125d-2.fw"
- #define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw"
- #define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw"
-
-@@ -139,6 +140,7 @@ static const struct {
- /* reserve 62 for CFG_METHOD_4 in the vendor driver */
- [RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
- [RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
-+ [RTL_GIGA_MAC_VER_65] = {"RTL8125D", FIRMWARE_8125D_2},
- [RTL_GIGA_MAC_VER_70] = {"RTL8126A", FIRMWARE_8126A_2},
- [RTL_GIGA_MAC_VER_71] = {"RTL8126A", FIRMWARE_8126A_3},
- };
-@@ -706,6 +708,7 @@ MODULE_FIRMWARE(FIRMWARE_8107E_2);
- MODULE_FIRMWARE(FIRMWARE_8125A_3);
- MODULE_FIRMWARE(FIRMWARE_8125B_2);
- MODULE_FIRMWARE(FIRMWARE_8125D_1);
-+MODULE_FIRMWARE(FIRMWARE_8125D_2);
- MODULE_FIRMWARE(FIRMWARE_8126A_2);
- MODULE_FIRMWARE(FIRMWARE_8126A_3);
-
-@@ -2259,6 +2262,7 @@ static enum mac_version rtl8169_get_mac_
- { 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
-
- /* 8125D family. */
-+ { 0x7cf, 0x689, RTL_GIGA_MAC_VER_65 },
- { 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
-
- /* 8125B family. */
-@@ -3839,6 +3843,7 @@ static void rtl_hw_config(struct rtl8169
- [RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
- [RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
- [RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
-+ [RTL_GIGA_MAC_VER_65] = rtl_hw_start_8125d,
- [RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
- [RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
- };
-@@ -3857,6 +3862,7 @@ static void rtl_hw_start_8125(struct rtl
- switch (tp->mac_version) {
- case RTL_GIGA_MAC_VER_61:
- case RTL_GIGA_MAC_VER_64:
-+ case RTL_GIGA_MAC_VER_65:
- for (i = 0xa00; i < 0xb00; i += 4)
- RTL_W32(tp, i, 0);
- break;
---- a/drivers/net/ethernet/realtek/r8169_phy_config.c
-+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
-@@ -1162,6 +1162,7 @@ void r8169_hw_phy_config(struct rtl8169_
- [RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
- [RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
- [RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
-+ [RTL_GIGA_MAC_VER_65] = rtl8125d_hw_phy_config,
- [RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
- [RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
- };
+++ /dev/null
-From b11bff90f2ad52c5c55c822ecd20326619a73898 Mon Sep 17 00:00:00 2001
-Date: Tue, 7 Jan 2025 14:43:55 +0800
-Subject: [PATCH] r8169: add support for RTL8125BP rev.b
-
-Add support for RTL8125BP rev.b. Its XID is 0x689. This chip supports
-DASH and its dash type is "RTL_DASH_25_BP".
-
----
- drivers/net/ethernet/realtek/r8169.h | 1 +
- drivers/net/ethernet/realtek/r8169_main.c | 30 +++++++++++++++++++
- .../net/ethernet/realtek/r8169_phy_config.c | 23 ++++++++++++++
- 3 files changed, 54 insertions(+)
-
---- a/drivers/net/ethernet/realtek/r8169.h
-+++ b/drivers/net/ethernet/realtek/r8169.h
-@@ -70,6 +70,7 @@ enum mac_version {
- RTL_GIGA_MAC_VER_63,
- RTL_GIGA_MAC_VER_64,
- RTL_GIGA_MAC_VER_65,
-+ RTL_GIGA_MAC_VER_66,
- RTL_GIGA_MAC_VER_70,
- RTL_GIGA_MAC_VER_71,
- RTL_GIGA_MAC_NONE
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -57,6 +57,7 @@
- #define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
- #define FIRMWARE_8125D_1 "rtl_nic/rtl8125d-1.fw"
- #define FIRMWARE_8125D_2 "rtl_nic/rtl8125d-2.fw"
-+#define FIRMWARE_8125BP_2 "rtl_nic/rtl8125bp-2.fw"
- #define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw"
- #define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw"
-
-@@ -141,6 +142,7 @@ static const struct {
- [RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
- [RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
- [RTL_GIGA_MAC_VER_65] = {"RTL8125D", FIRMWARE_8125D_2},
-+ [RTL_GIGA_MAC_VER_66] = {"RTL8125BP", FIRMWARE_8125BP_2},
- [RTL_GIGA_MAC_VER_70] = {"RTL8126A", FIRMWARE_8126A_2},
- [RTL_GIGA_MAC_VER_71] = {"RTL8126A", FIRMWARE_8126A_3},
- };
-@@ -632,6 +634,7 @@ enum rtl_dash_type {
- RTL_DASH_NONE,
- RTL_DASH_DP,
- RTL_DASH_EP,
-+ RTL_DASH_25_BP,
- };
-
- struct rtl8169_private {
-@@ -709,6 +712,7 @@ MODULE_FIRMWARE(FIRMWARE_8125A_3);
- MODULE_FIRMWARE(FIRMWARE_8125B_2);
- MODULE_FIRMWARE(FIRMWARE_8125D_1);
- MODULE_FIRMWARE(FIRMWARE_8125D_2);
-+MODULE_FIRMWARE(FIRMWARE_8125BP_2);
- MODULE_FIRMWARE(FIRMWARE_8126A_2);
- MODULE_FIRMWARE(FIRMWARE_8126A_3);
-
-@@ -1361,10 +1365,19 @@ static void rtl8168ep_driver_start(struc
- rtl_loop_wait_high(tp, &rtl_ep_ocp_read_cond, 10000, 30);
- }
-
-+static void rtl8125bp_driver_start(struct rtl8169_private *tp)
-+{
-+ r8168ep_ocp_write(tp, 0x01, 0x14, OOB_CMD_DRIVER_START);
-+ r8168ep_ocp_write(tp, 0x01, 0x18, 0x00);
-+ r8168ep_ocp_write(tp, 0x01, 0x10, 0x01);
-+}
-+
- static void rtl8168_driver_start(struct rtl8169_private *tp)
- {
- if (tp->dash_type == RTL_DASH_DP)
- rtl8168dp_driver_start(tp);
-+ else if (tp->dash_type == RTL_DASH_25_BP)
-+ rtl8125bp_driver_start(tp);
- else
- rtl8168ep_driver_start(tp);
- }
-@@ -1385,10 +1398,19 @@ static void rtl8168ep_driver_stop(struct
- rtl_loop_wait_low(tp, &rtl_ep_ocp_read_cond, 10000, 10);
- }
-
-+static void rtl8125bp_driver_stop(struct rtl8169_private *tp)
-+{
-+ r8168ep_ocp_write(tp, 0x01, 0x14, OOB_CMD_DRIVER_STOP);
-+ r8168ep_ocp_write(tp, 0x01, 0x18, 0x00);
-+ r8168ep_ocp_write(tp, 0x01, 0x10, 0x01);
-+}
-+
- static void rtl8168_driver_stop(struct rtl8169_private *tp)
- {
- if (tp->dash_type == RTL_DASH_DP)
- rtl8168dp_driver_stop(tp);
-+ else if (tp->dash_type == RTL_DASH_25_BP)
-+ rtl8125bp_driver_stop(tp);
- else
- rtl8168ep_driver_stop(tp);
- }
-@@ -1411,6 +1433,7 @@ static bool rtl_dash_is_enabled(struct r
- case RTL_DASH_DP:
- return r8168dp_check_dash(tp);
- case RTL_DASH_EP:
-+ case RTL_DASH_25_BP:
- return r8168ep_check_dash(tp);
- default:
- return false;
-@@ -1425,6 +1448,8 @@ static enum rtl_dash_type rtl_get_dash_t
- return RTL_DASH_DP;
- case RTL_GIGA_MAC_VER_51 ... RTL_GIGA_MAC_VER_53:
- return RTL_DASH_EP;
-+ case RTL_GIGA_MAC_VER_66:
-+ return RTL_DASH_25_BP;
- default:
- return RTL_DASH_NONE;
- }
-@@ -2261,6 +2286,9 @@ static enum mac_version rtl8169_get_mac_
- { 0x7cf, 0x64a, RTL_GIGA_MAC_VER_71 },
- { 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
-
-+ /* 8125BP family. */
-+ { 0x7cf, 0x681, RTL_GIGA_MAC_VER_66 },
-+
- /* 8125D family. */
- { 0x7cf, 0x689, RTL_GIGA_MAC_VER_65 },
- { 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
-@@ -3844,6 +3872,7 @@ static void rtl_hw_config(struct rtl8169
- [RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
- [RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
- [RTL_GIGA_MAC_VER_65] = rtl_hw_start_8125d,
-+ [RTL_GIGA_MAC_VER_66] = rtl_hw_start_8125d,
- [RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
- [RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
- };
-@@ -3863,6 +3892,7 @@ static void rtl_hw_start_8125(struct rtl
- case RTL_GIGA_MAC_VER_61:
- case RTL_GIGA_MAC_VER_64:
- case RTL_GIGA_MAC_VER_65:
-+ case RTL_GIGA_MAC_VER_66:
- for (i = 0xa00; i < 0xb00; i += 4)
- RTL_W32(tp, i, 0);
- break;
---- a/drivers/net/ethernet/realtek/r8169_phy_config.c
-+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
-@@ -1102,6 +1102,28 @@ static void rtl8125d_hw_phy_config(struc
- rtl8125_config_eee_phy(phydev);
- }
-
-+static void rtl8125bp_hw_phy_config(struct rtl8169_private *tp,
-+ struct phy_device *phydev)
-+{
-+ r8169_apply_firmware(tp);
-+ rtl8168g_enable_gphy_10m(phydev);
-+
-+ r8168g_phy_param(phydev, 0x8010, 0x0800, 0x0000);
-+
-+ phy_write(phydev, 0x1f, 0x0b87);
-+ phy_write(phydev, 0x16, 0x8088);
-+ phy_modify(phydev, 0x17, 0xff00, 0x9000);
-+ phy_write(phydev, 0x16, 0x808f);
-+ phy_modify(phydev, 0x17, 0xff00, 0x9000);
-+ phy_write(phydev, 0x1f, 0x0000);
-+
-+ r8168g_phy_param(phydev, 0x8174, 0x2000, 0x1800);
-+
-+ rtl8125_legacy_force_mode(phydev);
-+ rtl8168g_disable_aldps(phydev);
-+ rtl8125_config_eee_phy(phydev);
-+}
-+
- static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,
- struct phy_device *phydev)
- {
-@@ -1163,6 +1185,7 @@ void r8169_hw_phy_config(struct rtl8169_
- [RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
- [RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
- [RTL_GIGA_MAC_VER_65] = rtl8125d_hw_phy_config,
-+ [RTL_GIGA_MAC_VER_66] = rtl8125bp_hw_phy_config,
- [RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
- [RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
- };
+++ /dev/null
-From 135c3c86a7cef4ba3d368da15b16c275b74582d3 Mon Sep 17 00:00:00 2001
-Date: Mon, 3 Feb 2025 21:35:24 +0100
-Subject: [PATCH] r8169: make Kconfig option for LED support user-visible
-
-Make config option R8169_LEDS user-visible, so that users can remove
-support if not needed.
-
----
- drivers/net/ethernet/realtek/Kconfig | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/net/ethernet/realtek/Kconfig
-+++ b/drivers/net/ethernet/realtek/Kconfig
-@@ -114,7 +114,8 @@ config R8169
- will be called r8169. This is recommended.
-
- config R8169_LEDS
-- def_bool R8169 && LEDS_TRIGGER_NETDEV
-+ bool "Support for controlling the NIC LEDs"
-+ depends on R8169 && LEDS_TRIGGER_NETDEV
- depends on !(R8169=y && LEDS_CLASS=m)
- help
- Optional support for controlling the NIC LED's with the netdev
+++ /dev/null
-From faac69a4ae5abb49e62c79c66b51bb905c9aa5ec Mon Sep 17 00:00:00 2001
-Date: Tue, 4 Feb 2025 07:58:17 +0100
-Subject: [PATCH] r8169: don't scan PHY addresses > 0
-
-The PHY address is a dummy, because r8169 PHY access registers
-don't support a PHY address. Therefore scan address 0 only.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5229,6 +5229,7 @@ static int r8169_mdio_register(struct rt
- new_bus->priv = tp;
- new_bus->parent = &pdev->dev;
- new_bus->irq[0] = PHY_MAC_INTERRUPT;
-+ new_bus->phy_mask = GENMASK(31, 1);
- snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x-%x",
- pci_domain_nr(pdev->bus), pci_dev_id(pdev));
-
+++ /dev/null
-From d30460f42675fef5cd4b44ffbc49b545524555e3 Mon Sep 17 00:00:00 2001
-Date: Wed, 12 Feb 2025 08:03:56 +0100
-Subject: [PATCH] r8169: add support for Intel Killer E5000
-
-This adds support for the Intel Killer E5000 which seems to be a
-rebranded RTL8126. Copied from r8126 vendor driver.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -169,6 +169,7 @@ static const struct pci_device_id rtl816
- { PCI_VDEVICE(REALTEK, 0x8125) },
- { PCI_VDEVICE(REALTEK, 0x8126) },
- { PCI_VDEVICE(REALTEK, 0x3000) },
-+ { PCI_VDEVICE(REALTEK, 0x5000) },
- {}
- };
-
+++ /dev/null
-From 853e80369cfceb2331bf34f251ba11c6602cc67f Mon Sep 17 00:00:00 2001
-Date: Thu, 13 Feb 2025 20:15:42 +0100
-Subject: [PATCH] r8169: add PHY c45 ops for MDIO_MMD_VENDOR2 registers
-
-The integrated PHYs on chip versions from RTL8168g allow to address
-MDIO_MMD_VEND2 registers. All c22 standard registers are mapped to
-MDIO_MMD_VEND2 registers. So far the paging mechanism is used to
-address PHY registers. Add support for c45 ops to address MDIO_MMD_VEND2
-registers directly, w/o the paging.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 32 +++++++++++++++++++++++
- 1 file changed, 32 insertions(+)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5207,6 +5207,33 @@ static int r8169_mdio_write_reg(struct m
- return 0;
- }
-
-+static int r8169_mdio_read_reg_c45(struct mii_bus *mii_bus, int addr,
-+ int devnum, int regnum)
-+{
-+ struct rtl8169_private *tp = mii_bus->priv;
-+
-+ if (addr > 0)
-+ return -ENODEV;
-+
-+ if (devnum == MDIO_MMD_VEND2 && regnum > MDIO_STAT2)
-+ return r8168_phy_ocp_read(tp, regnum);
-+
-+ return 0;
-+}
-+
-+static int r8169_mdio_write_reg_c45(struct mii_bus *mii_bus, int addr,
-+ int devnum, int regnum, u16 val)
-+{
-+ struct rtl8169_private *tp = mii_bus->priv;
-+
-+ if (addr > 0 || devnum != MDIO_MMD_VEND2 || regnum <= MDIO_STAT2)
-+ return -ENODEV;
-+
-+ r8168_phy_ocp_write(tp, regnum, val);
-+
-+ return 0;
-+}
-+
- static int r8169_mdio_register(struct rtl8169_private *tp)
- {
- struct pci_dev *pdev = tp->pci_dev;
-@@ -5237,6 +5264,11 @@ static int r8169_mdio_register(struct rt
- new_bus->read = r8169_mdio_read_reg;
- new_bus->write = r8169_mdio_write_reg;
-
-+ if (tp->mac_version >= RTL_GIGA_MAC_VER_40) {
-+ new_bus->read_c45 = r8169_mdio_read_reg_c45;
-+ new_bus->write_c45 = r8169_mdio_write_reg_c45;
-+ }
-+
- ret = devm_mdiobus_register(&pdev->dev, new_bus);
- if (ret)
- return ret;
+++ /dev/null
-From 473367a5ffe1607a61be481e2feda684eb5faea9 Mon Sep 17 00:00:00 2001
-Date: Fri, 7 Mar 2025 08:29:47 +0100
-Subject: [PATCH] r8169: increase max jumbo packet size on RTL8125/RTL8126
-
-Realtek confirmed that all RTL8125/RTL8126 chip versions support up to
-16K jumbo packets. Reflect this in the driver.
-
-Tested by Rui on RTL8125B with 12K jumbo packets.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -89,6 +89,7 @@
- #define JUMBO_6K (6 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
- #define JUMBO_7K (7 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
- #define JUMBO_9K (9 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
-+#define JUMBO_16K (SZ_16K - VLAN_ETH_HLEN - ETH_FCS_LEN)
-
- static const struct {
- const char *name;
-@@ -5366,6 +5367,9 @@ static int rtl_jumbo_max(struct rtl8169_
- /* RTL8168c */
- case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_24:
- return JUMBO_6K;
-+ /* RTL8125/8126 */
-+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
-+ return JUMBO_16K;
- default:
- return JUMBO_9K;
- }
+++ /dev/null
-From 3d9b8ac5341269d31e59fd5d58d47266ac78bc32 Mon Sep 17 00:00:00 2001
-Date: Tue, 18 Mar 2025 16:37:20 +0800
-Subject: [PATCH] r8169: enable RTL8168H/RTL8168EP/RTL8168FP ASPM support
-
-This patch will enable RTL8168H/RTL8168EP/RTL8168FP ASPM support on
-the platforms that have tested with ASPM enabled.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5404,7 +5404,7 @@ done:
- /* register is set if system vendor successfully tested ASPM 1.2 */
- static bool rtl_aspm_is_safe(struct rtl8169_private *tp)
- {
-- if (tp->mac_version >= RTL_GIGA_MAC_VER_61 &&
-+ if (tp->mac_version >= RTL_GIGA_MAC_VER_46 &&
- r8168_mac_ocp_read(tp, 0xc0b2) & 0xf)
- return true;
-
+++ /dev/null
-From b48688ea3c9ac8d5d910c6e91fb7f80d846581f0 Mon Sep 17 00:00:00 2001
-Date: Tue, 18 Mar 2025 16:37:21 +0800
-Subject: [PATCH] r8169: disable RTL8126 ZRX-DC timeout
-
-Disable it due to it dose not meet ZRX-DC specification. If it is enabled,
-device will exit L1 substate every 100ms. Disable it for saving more power
-in L1 substate.
-
----
- drivers/net/ethernet/realtek/r8169_main.c | 27 +++++++++++++++++++++++
- 1 file changed, 27 insertions(+)
-
---- a/drivers/net/ethernet/realtek/r8169_main.c
-+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -2855,6 +2855,32 @@ static u32 rtl_csi_read(struct rtl8169_p
- RTL_R32(tp, CSIDR) : ~0;
- }
-
-+static void rtl_disable_zrxdc_timeout(struct rtl8169_private *tp)
-+{
-+ struct pci_dev *pdev = tp->pci_dev;
-+ u32 csi;
-+ int rc;
-+ u8 val;
-+
-+#define RTL_GEN3_RELATED_OFF 0x0890
-+#define RTL_GEN3_ZRXDC_NONCOMPL 0x1
-+ if (pdev->cfg_size > RTL_GEN3_RELATED_OFF) {
-+ rc = pci_read_config_byte(pdev, RTL_GEN3_RELATED_OFF, &val);
-+ if (rc == PCIBIOS_SUCCESSFUL) {
-+ val &= ~RTL_GEN3_ZRXDC_NONCOMPL;
-+ rc = pci_write_config_byte(pdev, RTL_GEN3_RELATED_OFF,
-+ val);
-+ if (rc == PCIBIOS_SUCCESSFUL)
-+ return;
-+ }
-+ }
-+
-+ netdev_notice_once(tp->dev,
-+ "No native access to PCI extended config space, falling back to CSI\n");
-+ csi = rtl_csi_read(tp, RTL_GEN3_RELATED_OFF);
-+ rtl_csi_write(tp, RTL_GEN3_RELATED_OFF, csi & ~RTL_GEN3_ZRXDC_NONCOMPL);
-+}
-+
- static void rtl_set_aspm_entry_latency(struct rtl8169_private *tp, u8 val)
- {
- struct pci_dev *pdev = tp->pci_dev;
-@@ -3827,6 +3853,7 @@ static void rtl_hw_start_8125d(struct rt
-
- static void rtl_hw_start_8126a(struct rtl8169_private *tp)
- {
-+ rtl_disable_zrxdc_timeout(tp);
- rtl_set_def_aspm_entry_latency(tp);
- rtl_hw_start_8125_common(tp);
- }
projects / openwrt / openwrt.git / commitdiff